Optical Networking & Photonics
Overview / thesis
Optical networking is the interconnect layer of the AI compute stack. Every GPU in a training cluster has to talk to every other GPU, and past a few meters light is the only medium fast enough and power-efficient enough to do it. That single fact — generative AI clusters need 10–100x more fiber than traditional cloud workloads — is the spine of the entire thesis. The interesting money is not in the GPU; it is in the plumbing the GPU cannot work without, and that plumbing is being rebuilt at every speed generation.
The thesis in one paragraph
AI training clusters at 100K+ GPUs need 800G optical transceivers for GPU-to-GPU communication today, transitioning to 1.6T in 2026 (the "Year of 1.6T") and 3.2T toward 2029–2030. The supply chain splits cleanly by geography: the USA designs the chips (DSPs, SerDes, driver ICs), China manufactures the modules (InnoLight, Eoptolink hold ~60% of NVIDIA's 800G volume), Taiwan assembles and fabricates the silicon photonics, and Japan dominates the precision-component layer (tunable lasers, APC connectors, ultra-low-loss fiber, test gear) that most investors have never heard of. The structural opportunity is that demand is exploding while the value chain reorganizes around three unresolved architectural questions — silicon photonics vs. monolithic InP, co-packaged optics (CPO) vs. pluggable, and DSP-based vs. linear-drive (LPO/LRO) — each of which redistributes margin to different winners. The "so what": optical content per GPU and per rack is rising faster than GPU count, and the picks-and-shovels suppliers who feed NVIDIA's ecosystem without competing with it (foundries, laser-chip makers, module assemblers) capture disproportionate value, while pure-play transceiver vendors face margin compression from both NVIDIA's architecture advantages and Chinese cost competition.
Why it matters — the scaling crisis driving everything
The demand driver is a hardware imbalance, not a fad. Over 20 years, compute performance surged 60,000x, but memory bandwidth grew only 100x and I/O bandwidth just 30x. Optical interconnect is how the industry attacks the I/O wall — copper runs out of room around 200 Gb/s per lane and roughly 2 meters of reach. AI datacenter bandwidth is projected to grow 6x by 2030. As clusters approach 100,000+ accelerators, network power becomes untenable: network power consumption climbs from 5% to 15–20% of datacenter CapEx, and backend AI networks already account for roughly 85% of networking cost and 86% of networking power in modern GPU clusters. Each NVIDIA GB200 NVL72 rack requires dense optical interconnects; NVIDIA's Blackwell GPUs require roughly 2x 800G transceivers per GPU (H200 ~2.5, H200-class), and at the scale-out layer the ratio is 1 OSFP port per GPU. Oracle's 131K-GPU fabric uses optical links at every networking level. This is why the optics market decouples from the broader, cyclical telecom-equipment market and rides AI capex instead — hyperscaler capex (Meta, Google, Microsoft, Amazon) exceeded $200B combined in 2025–2026, with a meaningful slice going to optical networking.
Sizing the opportunity (TAM/SAM)
The headline: the total optical transceiver market was roughly flat at $11.0B (2022) to $10.9B (2023) before AI infrastructure spending transformed the trajectory. Forecasts now show AI clusters roughly doubling the optical market by 2029, with the AI-specific slice growing far faster than the whole. The numbers across the source forecasters (LightCounting, Yole, Raymond James, Cignal AI, Mordor, Fortune Business Insights):
| Metric | 2023 | 2024E | Forward | CAGR |
|---|---|---|---|---|
| Total transceiver market | $10.9B | ~$17B | $22–25B (2029) | 15–16% |
| AI cluster / backend optics | ~$2B | $5B | $10B+ (2029); RJ $22.2B (2030) | 30–38% |
| Optical interconnect (total) | — | ~$19–21B (2025) | ~$40–52B (2030–31) | 13–15% |
| Optical interconnect in AI datacenters | — | ~$10B (2025) | ~$31B (2033) | ~15% |
| Datacom optical components | ~$4B / $9B (2024) | $16B (2025) | $16B (2028) | ~30% |
| Silicon photonics PICs (Yole) | $95M | — | $863M+ (2029) | 45% |
| Silicon photonics market (broad) | $2.65B (2025) | — | $9.65B (2030) / $15.83B (2032) | 25.3–29.5% |
| SiPh transceiver share of market | ~22–24% | — | 44–45% (2028) | — |
| Co-packaged optics (CPO) | $15M | — | $20B (2036); $8.1B (2030) | 37% |
| InP substrate market | $198–210M (2025) | — | $385–600M (2031) | — |
| Passive optical components | ~$39B (2025) | — | ~$126B (2035) | ~12.5% |
| Optical test equipment | ~$1.0–1.7B | — | ~$1.5B (2032) | ~4.4% |
| Optical transport equipment | ~$18–20B (2024) | — | — | 10–15% |
Links above 400 Gbps are growing at a 33.7% CAGR through 2031. LightCounting projected 57% growth in 2024 and 62% in 2025, moderating to ~20% by 2026. Shipments of 400G/800G modules exceeded 20 million units in 2024 (~$9B revenue); 800G shipments hit 24 million units in 2025 and are projected to reach 63 million units in 2026 (2.6x). The 1.6T generation is expected to reach 10 million units in just 4 years versus a decade for 100G. The broader telecom-plus-RAN equipment market is $60–70B+ annually, with optical transport (~$18–20B) growing far faster than RAN (~$35–40B) precisely because of the AI/DCI driver.
The demand drivers, ranked
- AI datacenter buildout (strongest near-term). East-west GPU-to-GPU traffic, 10–100x more fiber than cloud, hyperscaler capex over $200B. 800GbE optics shipments grew 60% in 2025 (Cignal AI / Cignal).
- Speed migration (800G → 1.6T → 3.2T). Each step refreshes demand across lasers, modulators, DSPs, and test gear, and can reshuffle market share — companies that miss a generation's design wins can lose them permanently.
- Coherent optics into metro/edge. 400ZR/800ZR/ZR+ pluggables displace proprietary line-side transponders; metro expected to be >60% of coherent pluggable shipments by 2026; coherent pluggables drove essentially all telecom bandwidth growth in 2024.
- Optical circuit switching (OCS). MEMS-based optical switches replacing electrical spine layers in hyperscale fabrics; market projected to ~$2.5B by 2029 (Cignal AI), Google-pioneered, now broadening — see LITE.
- Multi-DC training / long-haul. Exabyte-scale data transit between facilities; pluggables encroaching on transponders.
- Adjacencies. Semiconductor metrology via OCT (~$17B → ~$23B by 2029), photonic quantum computing ($1.1B 2030 → $7B 2036), 5G fronthaul fiber, and submarine cable builds.
The structural debates that decide who wins
The cross-cutting tension in every source is that the market is huge and growing but the architecture is unsettled, and the architecture determines margin distribution. Four debates recur:
CPO vs. pluggable. Co-packaged optics integrates the optical engine next to the switch ASIC, claiming 3.5x better power efficiency (NVIDIA: 9W vs. 30W per 1.6T port), lower latency, and higher density. Skeptics note that every generation, CPO proponents say "this is the last pluggable" and every generation pluggable wins on flexibility and serviceability. The unresolved question — does the pattern break at 1.6T (bulls) or only at 3.2T, ~2028+ (skeptics) — determines whether the silicon-photonics foundry bets pay off. The progression the industry actually deploys is pluggable → LPO → CPO → on-package optical I/O.
Silicon photonics vs. monolithic InP. SiPho leverages CMOS-scale 300mm manufacturing (Intel has shipped 8M+ PICs; targets <$0.10/Gbps vs. $1–10/Gbps for traditional) and is projected to grow from ~24% to 44% of the transceiver market by 2028. But it cannot emit light — every SiPho transceiver still depends on an external InP laser source, making InP the single biggest supply bottleneck in the industry. The two paradigms are converging through heterogeneous integration rather than one displacing the other.
DSP vs. linear drive (LPO/LRO). The DSP consumes ~50% of a pluggable module's power (~4W at 400G, 12–13W at 800G) and 20–40% of module cost. LPO eliminates it entirely for 25–50% power reduction and up to 90% latency reduction; LRO keeps DSP on transmit only. This threatens the Marvell/Broadcom DSP duopoly — see MRVL.
The InP wafer-size and substrate-concentration question. InP is irreplaceable physics (direct bandgap, telecom-wavelength emission) but constrained by small wafers (the 3-inch → 4-inch → 6-inch transition is the most consequential manufacturing shift in compound semis in a generation) and by substrate supply concentrated in China (AXT/Tongmei ~60–70%, subject to China's Feb 2025 indium export controls). See inp-sige-photonic-materials.
Why this is structurally a hard sector to invest in — the counter-thesis
The brutally honest counterweight to the growth story: component suppliers capture only about 1/12th of total photonics market value, and the sector is a graveyard — JDS Uniphase's record $50.6B loss (stock −99.4%), Nortel's collapse (38% of the TSX at peak, bankrupt 2009). Even in the AI boom, companies beating earnings get punished — Coherent fell 20% after beating Q2 2025 on a 0.6% guidance miss; Coherent's datacenter growth decelerated from 58% to 24% across successive quarters. Structural problems: extreme fragmentation (~30 companies above $1B revenue, hundreds below $10M), manufacturing complexity where alignment consumes ~80% of PIC cost and silicon photonics testing 60–90% of product cost, customer concentration (20–60% of revenue from single customers), 12–24 month qualification cycles (Telcordia GR-468), and constant technology-transition risk that can strand a generation's investment. The conclusion this strand pushes: prefer diversified exposure or the picks-and-shovels nodes (foundries, assembly, laser chips, test) over pure-play module vendors. The whole-systems photonics market is sized far larger — projected from $920 billion to $2 trillion by 2035 — but suppliers historically fail to capture it.
Where value concentrates in the stack
The recurring "picks-and-shovels" conclusion: the highest-margin, highest-barrier node is the coherent DSP / merchant silicon layer (50–70% gross margins, multi-hundred-million-dollar development programs, a handful of designers), followed by silicon photonics foundries (Tower, GlobalFoundries, TSMC's COUPE) and InP laser-chip makers (Lumentum ~50–60% EML share, Coherent's 6-inch InP). Module assembly (Fabrinet ~50% of outsourced optical manufacturing) is lower-margin but a direct AI-infrastructure proxy. The consensus winners across analyst coverage share one trait — they supply NVIDIA's optical ecosystem without competing with it. Company-specific theses live on ticker pages: TSEM, LITE, COHR, MRVL, FN, 5802, 6777, 6855, 6834, AIXA, SOITEC.
The geopolitical and supply-security overlay
Transceiver-module manufacturing concentrated in China (InnoLight, Eoptolink, Accelink) is treated across sources as a supply-security risk for AI networking, and the Japan optics chain (6777, 6855, 6834, 5802) as a friend-shoring opportunity. Tariff lines are live: US tariffs up to 104% on Chinese optical fiber (April 2025), China anti-dumping duties of 33.3–78.2% on US fiber-optic products, with combined rates reaching 125–145% on some imports. China's vertical integration of InP epitaxy lowered coherent-module pricing ~25% vs. 2023. The CHIPS Act allocates $32B+ supporting domestic silicon photonics capacity. The market is bifurcating into "China" and "rest-of-world" ecosystems.
How it works
Optical networking moves data as pulses of light through hair-thin glass fiber. The whole industry exists because photons beat electrons on every axis that matters for moving bits over distance: a single fiber can carry 100+ Tbps versus ~10 Gbps for copper, runs 100+ km between amplifiers versus ~100m for copper, travels at roughly 0.67c (the speed of light in glass), is immune to electromagnetic interference, and is hair-thin and lightweight. Light operates at optical frequencies near 200 THz versus radio's GHz, which is the raw source of the bandwidth advantage. Every GPU-to-GPU link in an AI cluster, every datacenter interconnect, every long-haul backbone, every cell-site fronthaul ultimately depends on this physics. What follows is how it physically works, generation by generation, plus the unit economics and the engineering choices that create the moats.
The physics: how light becomes data
The foundation is total internal reflection. A fiber has a core with a higher refractive index (~1.46) surrounded by cladding with a slightly lower index (~1.45). That tiny 0.01 difference is enough that light hitting the core-cladding boundary at angles greater than ~83.2 degrees reflects completely back into the core — the light is trapped and guided down the fiber's length. Standard communication uses near-infrared, particularly 1550 nm, because that is the "sweet spot" where silica glass exhibits minimum absorption and scattering: only 0.2 dB of loss per kilometer, meaning half the optical power survives 15 km. This is what makes transcontinental links possible without electronic regeneration.
Light is a richer carrier than voltage because information can be encoded into four independent properties simultaneously: amplitude, phase, frequency (wavelength), and polarization. Electrical systems are stuck modulating voltage alone. The simplest scheme is amplitude modulation (turning brightness on and off — on/off keying). More sophisticated systems use phase modulation, and the most advanced (QAM) modulate both amplitude and phase to pack multiple bits into a single light pulse.
Fiber types split the market. Multi-mode fiber has a large core (~50 microns), lets multiple light paths bounce around inside, is cheap and easy to work with, but suffers modal dispersion (different modes arrive at slightly different times) that caps distance at roughly 500m — used inside buildings and datacenters. Single-mode fiber has a tiny core (~9 microns) so only one mode propagates, eliminating modal dispersion and enabling tens to hundreds of km — used for everything outside the building (metro, long-haul, submarine). Common wavelengths are 850 nm (multimode short reach), 1310 nm (O-band), and 1550 nm (C-band).
Wavelength-Division Multiplexing — the capacity unlock
The single most important innovation in optical networking history is WDM: a single fiber carries many wavelengths (colors) of light simultaneously, each an independent data channel. Without WDM you get one conversation per fiber; with it you get 80, 96, or 100+. Think of it as splitting a highway into separate lanes, all sharing the same physical road — or splitting white light through a prism, where colors coexist without interfering.
Two flavors:
| Parameter | CWDM (Coarse) | DWDM (Dense) |
|---|---|---|
| Channel spacing | 20 nm | 0.8 nm (100 GHz) or 0.4 nm (50 GHz) |
| Channels | Up to 16-18 | 40-96 (up to 160 ultra-dense) |
| Wavelength range | 1270-1610 nm (multiple bands) | 1530-1565 nm C-Band, extending to L-Band |
| Amplification | Not supported (no EDFA) | EDFA amplification supported |
| Max distance | ~80 km | Hundreds to thousands of km |
| Cost | Lower (uncooled lasers) | Higher (precision temperature-controlled lasers) |
| Use case | Campus, enterprise, short metro | Long-haul, metro core, DCI |
CWDM is the budget option — fewer channels, shorter reach, simpler because it uses uncooled lasers with wide channel spacing. DWDM is the workhorse of global telecom: it packs channels tightly in the C-Band (and increasingly L-Band), requires precision temperature-controlled lasers to prevent wavelength drift, and supports optical amplification. A single DWDM fiber pair running 96 wavelengths × 800 Gbps each carries ~76.8 Tbps; add the L-band (1565-1625 nm, another ~80 channels) and you roughly double that. The industry isn't running out of fiber capacity — it's running out of the electronics and optics to fill it.
What limits capacity is the Shannon limit applied to the optical channel. You cannot encode infinite bits per symbol; eventually noise wins. The practical ceilings: amplifier noise (ASE) added at each hop degrading SNR; fiber nonlinear effects at high power (self-phase modulation, cross-phase modulation, four-wave mixing); chromatic dispersion (different wavelengths travel at slightly different speeds, smearing pulses — now digitally compensated); and polarization mode dispersion (random birefringence changes). The industry is within roughly 2-3x of the Shannon limit on standard single-mode fiber. Getting closer requires new fiber (hollow-core, multi-core) or space-division multiplexing — both active research areas, and the reason ultra-low-loss and multi-core fiber (5802 Sumitomo Electric) matters.
The four core components that convert and manipulate light
Every optical link rests on four component types that move signals between the electrical and optical domains:
Lasers (the light engine). DFB (Distributed Feedback) lasers generate single-frequency light with extraordinary spectral purity — linewidths in MHz, not the broad spectra of LEDs — via a periodic Bragg grating integrated into the laser cavity that provides wavelength-selective feedback (grating period = half the desired wavelength). This stability is essential for coherent detection and DWDM. EMLs (Electro-absorption Modulated Lasers) monolithically integrate a DFB laser with an electro-absorption modulator on a single chip — arguably the most successful InP photonic integrated circuit ever built, achieving 200G/lane at sub-2V drive. Tunable lasers let one device cover the whole C-Band (~40 nm), replacing 80+ fixed-wavelength SKUs with a single part, enabling remote re-provisioning and serving as the local oscillator in coherent transceivers.
Modulators (encoding data onto light). Mach-Zehnder Modulators (MZM/MZI) split light into two arms, apply a voltage-controlled phase shift to one, then recombine — constructive interference gives bright output, 180-degree-out-of-phase gives dark. They exploit the electro-optic Pockels effect (an applied field changes the refractive index) and eliminate the "chirp" that plagues directly-modulated lasers at high speed, with bandwidths exceeding 40 GHz. Lithium niobate MZMs operate at 1-2V versus 3-6V for silicon plasma-dispersion devices. Micro-ring modulators (MRM) are the newer, denser approach (detailed below).
Photodetectors (light back to electrical). PIN photodiodes are the workhorse — photons striking the intrinsic region under reverse bias create electron-hole pairs and a current proportional to optical power. APDs (avalanche photodiodes) add internal gain (10-100x) through impact ionization, dramatically improving weak-signal sensitivity at the cost of added noise. Germanium-on-silicon detectors are now standard in silicon photonics (see materials below).
PICs (Photonic Integrated Circuits). These place dozens to thousands of optical functions — lasers, modulators, filters, couplers, photodetectors — on a single chip with low-loss waveguide interconnects, doing for optics what ICs did for electronics. Silicon offers tight light confinement and CMOS compatibility; InP enables integrated lasers and amplifiers; lithium niobate offers superior modulation. Intel has shipped over 8 million PICs with 32+ million integrated on-chip lasers, demonstrating manufacturing maturity. Modern PICs integrate 50+ components; the roadmap targets monolithic integration of 10,000+ component PICs alongside electronic processing on a single substrate.
Modulation formats and the reach-vs-capacity tradeoff
Higher-order modulation packs more bits per symbol but needs better SNR, so it trades reach for capacity. The core relation is Baud rate = Bit rate / Bits per symbol.
- NRZ (Non-Return to Zero): binary on/off, 1 bit/symbol. Low bandwidth, simple, but long bit runs cause sync issues.
- PAM4 (4-level Pulse Amplitude Modulation): four amplitude levels = 2 bits/symbol, doubling the data rate without proportionally raising baud rate. The standard for 400G/800G Ethernet (QSFP-DD, OSFP). Reduced noise margin makes it more sensitive, limiting it to shorter reach. Copper PAM4 is limited to <2 meters.
- PAM8: 8 levels = 3 bits/symbol; lower noise margin, complex DSP; more practical than jumping to QAM for short reach.
- QAM (Quadrature Amplitude Modulation): amplitude + phase. 16QAM = 4 bits/symbol, 64QAM = 12 bits/symbol. Sensitive to phase noise; better for long-distance coherent optical.
For coherent long-haul, the format-to-reach map is explicit:
| Format | Bits/Symbol | Typical Capacity | Typical Reach |
|---|---|---|---|
| DP-QPSK | 4 | 100-200G | 3,000+ km (transoceanic) |
| DP-8QAM | 6 | 300-400G | 1,500-2,000 km |
| DP-16QAM | 8 | 400-600G | 500-1,000 km |
| DP-32QAM | 10 | 600-800G | 200-500 km |
| DP-64QAM | 12 | 800G-1.2T | <200 km (DCI) |
Probabilistic constellation shaping (PCS) adjusts the distribution of constellation points to fine-tune the capacity-reach tradeoff continuously rather than choosing discrete formats. Baud rate is the other lever — the industry has gone from ~32 Gbaud to 100+ Gbaud, with next-gen engines targeting 140-200 Gbaud.
Coherent optical technology — the long-haul game changer
Before ~2008, systems used intensity modulation with direct detection (IM-DD): vary laser brightness (on/off keying, essentially Morse code with light), receive with a simple photodetector measuring brightness. Fine for 10 Gbps/wavelength but capped at 1 bit/symbol.
Coherent detection unlocks the full carrying capacity by modulating amplitude, phase, and polarization (single-mode fiber supports two orthogonal polarization states, X and Y) simultaneously on both polarizations. Physically: the transmitter uses a narrow-linewidth laser and a dual-polarization IQ modulator; the receiver uses a local oscillator laser that "beats" against the incoming signal (like needing a reference frequency to decode AM/FM radio), letting it measure both amplitude and phase. The electrical output feeds a DSP chip that compensates chromatic dispersion, PMD, phase noise, and nonlinear effects, and applies forward error correction. The first commercial coherent systems (Ciena WaveLogic, ~2008) delivered 40 Gbps/wavelength — 4x the 10G direct-detect systems — opening a progression to 1.6 Tbps/wavelength today.
The per-wavelength capacity progression tracks DSP CMOS node directly:
| Timeframe | Capacity/Wavelength | DSP Node | Key Enabler |
|---|---|---|---|
| ~2008-2012 | 40-100G | 65/40nm | First coherent, DP-QPSK |
| ~2013-2016 | 100-200G | 28/16nm | Higher baud, 16QAM |
| ~2017-2019 | 200-400G | 16/7nm | 64 Gbaud, PCS |
| ~2020-2023 | 400-800G | 7/5nm | 100+ Gbaud, advanced FEC |
| ~2024-2026 | 800G-1.6T | 5/3nm | 140+ Gbaud, 3nm DSP, PCS |
That's roughly a 40x per-wavelength capacity increase since 2008 while power per bit improved 95%+. Ciena's WaveLogic 6 Extreme (3nm) demonstrated 1.6 Tbps on a single wavelength over 700 km in commercial deployment; WaveLogic 6 Nano uses 3nm CMOS for >20% power reduction over the prior generation.
ZR / coherent pluggables — collapsing the transponder
ZR (originally "Zero-distance Reach," an OIF standard) is cost-effective, low-power coherent optics for metro and datacenter interconnect, up to ~80 km. The key move: 400ZR put 400 Gbps/wavelength into a pluggable QSFP-DD or OSFP form factor (16QAM, dual-polarization, ~120 km over a single span, interoperable between vendors) that plugs directly into routers and switches — eliminating the separate transponder shelf. This is a structural shift: one device instead of two, lower cost and power, simpler architecture, but it threatens traditional optical equipment vendors' transponder revenue. 400ZR+ extends reach to 500-2,000+ km with vendor-specific enhancements (sacrificing interoperability for performance); 800ZR/800ZR+ is in development. Metro is expected to account for >60% of coherent pluggable shipments by 2026, and coherent pluggables drove all telecom bandwidth growth in 2024. The tradeoff debate: pluggables win on space, power, cost, and simplicity but sacrifice some bandwidth versus dedicated long-haul transponders (e.g., Ciena, ~70% of inter-DC transponder share); ZR+ pushes pluggables into <40 km long-haul and increasingly beyond.
The optical network equipment stack (long-haul / metro)
A DWDM network is built from a few building blocks: transponders (take client-side 400GbE, convert to a DWDM wavelength via the coherent engine, send down the fiber) and muxponders (aggregate multiple lower-rate clients onto one wavelength). ROADMs (Reconfigurable Optical Add-Drop Multiplexers) are the traffic cops — at each node they can add local wavelengths, drop specific wavelengths for local delivery, or pass through wavelengths headed elsewhere, all remotely without manual fiber patching. Modern CDC-F ROADMs (Colorless, Directionless, Contentionless, Flex-grid) let any wavelength be added/dropped on any port in any direction with variable channel widths, enabling mesh networks that reroute around failures in seconds (ring topologies provide 50ms protection switching). ROADMs are built from Wavelength Selective Switches (WSS) — typically implemented with LCOS (Liquid Crystal on Silicon) spatial light modulators — that independently route each wavelength from an input port to any of N outputs with per-channel power attenuation. Optical Channel Monitors (OCM) continuously measure the power and wavelength of every channel for network health.
Optical amplifiers are why DWDM is practical: light loses ~0.2 dB/km, so every 80-100 km you amplify. EDFAs (Erbium-Doped Fiber Amplifiers) — erbium-doped fiber pumped by a laser — amplify all C-band (or L-band) wavelengths simultaneously without converting to electrical, simple and reliable. Raman amplification uses the transmission fiber itself as gain medium (stimulated Raman scattering with a backward pump laser), giving lower noise and extended reach, often combined with EDFAs for ultra-long-haul and submarine.
From 400G to 1.6T to 3.2T — scaling by lane parallelization
The AI buildout is the dominant demand driver. Generative AI clusters require 10-100x more fiber than traditional cloud, because tens of thousands of GPUs executing collective operations (all-reduce, all-gather, reduce-scatter) for gradient synchronization generate massive, sustained, predictable east-west traffic that copper cannot carry past ~2m at these rates. NVIDIA Blackwell needs roughly 2 800G transceivers per GPU; an H200 needs ~2.5 800G transceivers per GPU.
The speed roadmap, and the crucial point that each generation scales by multiplying parallel lanes, not by making individual channels faster:
| Generation | Speed | Status (2026) | Key Technology |
|---|---|---|---|
| 400G | 400 Gbps | Mature, volume | PAM4, 4×100G, direct-detect or coherent |
| 800G | 800 Gbps | Ramping, majority of new AI clusters | 4×200G PAM4, QSFP-DD/OSFP |
| 1.6T | 1.6 Tbps | Early production; 2026 the "Year of 1.6T" | 8×200G or 4×400G, OSFP224/OSFP-XD |
| 3.2T | 3.2 Tbps | R&D/prototype, ~2029-2030 | Co-packaged optics (CPO) |
The 100GbE generation taught the pattern: 100GbE = 4 fiber pairs × 25 Gbps; 400GbE can be 4×100G per fiber, a single fiber with 4 colors × 100G (WDM), or a single 400G wavelength (low-volume, high-price). 800G sockets are 4×200G — harder but doable. Long-haul reaches up to 800G on a single wavelength with sophisticated DSPs. 1.6T converged on the OSFP224 form factor with 8×200G PAM4 lanes. The 1.6T generation is expected to reach 10 million units in just 4 years versus a decade for 100G; 400G/800G shipments exceeded 20 million units in 2024 (~$9B revenue), with 800G shipments hitting 24 million units in 2025 and projected ~63 million in 2026 (2.6x).
The transceiver BOM and where power goes
Inside a pluggable transceiver: laser sources (DFB/EML/tunable), modulators, photodetectors, MUX/DEMUX for WDM, analog front-end (laser drivers, TIAs, limiting amplifiers, modulator drivers, CDR/equalizers, ADC/DAC for coherent), and — historically — a DSP. These chips don't need cutting-edge 3nm logic; most analog ICs run at mature nodes (28nm, 40nm, 65nm) because the value is analog performance, not digital density (coherent DSPs are the exception, riding 7/5/3nm).
The DSP is the power hog. It performs signal conditioning, FEC (commonly Reed-Solomon RS(544,514)), adaptive equalization (FFE/FIR, DFE, CTLE, IIR), and channel-impairment compensation. It consumes ~50% of a pluggable module's total power — ~4W in a 400G module, 12-13W in an 800G module — and represents 20-40% of module cost ($50-70 of BOM). That makes it the obvious target for elimination as 800G/1.6T modules hit ~30W thermal limits. A 1.6T transceiver runs ~$850 each at ~30W. At the rack level, per-rack transceiver costs of ~$550,800 translate to ~$2.2M to customers at a 75% margin target.
CDR (Clock and Data Recovery) is the timing foundation: every SerDes contains a CDR because high-speed serial streams cannot practically carry a separate clock (signal integrity, power, EMI). The CDR extracts timing via PLL/DLL and retimes data to strip jitter, using phase detectors (Alexander/Bang-Bang, Hogge linear, baud-rate). Modern timing also depends on ultra-low-jitter reference clocks — MEMS oscillators (e.g., SiTime) deliver ~20-50x better reliability and far smaller form factor than quartz, increasingly required for 800G→1.6T transceivers and GPU synchronization.
LPO and LRO — killing the DSP
Linear Pluggable Optics (LPO) eliminates the transceiver DSP entirely, moving signal conditioning to the host switch ASIC's SerDes (direct-drive). Documented benefits: 40-50% power reduction (14W → <8W for 800G; other sources cite 25-40%), up to 90% latency reduction (no DSP processing delay), and significant cost savings (removing the $50-70 DSP). The enabler is high-quality switch SerDes — Broadcom's Tomahawk 5 is called the "best SerDes in the game today." Credo is the primary LPO champion (Dove 850 for 800G). LRO (Linear Receive Optics / Linear Reach Optics) is the hybrid compromise: DSP retained on transmit for signal generation, removed from receive for ~50% power savings — "all the talk" in 2024. The LPO MSA has 50+ industry members defining interoperability. This is a structural threat to merchant DSP incumbents (Marvell). Standards remain immature, and mixing LPO/LRO/CPO gear across vendors is still tricky.
Silicon photonics vs monolithic InP — two architectures, one dependency
The deepest fault line in the industry. Silicon photonics (SiPho) is built on SOI (silicon-on-insulator) wafers — typically a 220 nm silicon device layer on 2 μm buried oxide on 200/300 mm handle wafers, fabricated with modified CMOS processes. The high index contrast (Si n≈3.48 vs SiO₂ n≈1.44) enables ultra-compact waveguides, ring resonators, and arrayed waveguide gratings (AWGs) for on-chip muxing. It leverages 50 years of CMOS optimization, wafer-scale testing for known-good-die, and multiple Tier-1 foundries. But silicon physically cannot emit light: it has an indirect bandgap (~1.12 eV) so radiative recombination requires a phonon (a three-body process), giving a luminescence quantum efficiency of ~10⁻⁶. SiPho must therefore import every photon from an external InP laser. Coupling that external laser into silicon waveguides is alignment "satanic suffering" — submicron precision causing ~2.5 dB coupling loss and significant packaging cost.
Monolithic InP integrates everything — laser, modulator, SOA, detector, waveguide, mux — on a single InP substrate (Infinera/Nokia pioneered 40+ laser PICs). No hybrid assembly for the light source, on-chip amplification, EML bandwidths >65 GHz supporting 212 Gbps PAM4 at 106 GBaud. The catch is wafer size and yield: InP runs primarily on small wafers, "tiny InP wafer yield is shit," and the laser-modulator butt-joint requires extreme process control.
| Parameter | Silicon photonics (SOI) | InP monolithic |
|---|---|---|
| Wafer size | 200-300 mm | 75-150 mm |
| On-chip laser | No — requires hybrid InP | Yes — native |
| On-chip SOA | Not possible | Yes — 15-40 dB gain |
| Modulator efficiency (VπL) | 10-25 V·mm | 1-3 V·mm |
| Waveguide loss | 0.1-1 dB/cm (SiN) | 1-3 dB/cm |
| Cost per die at volume | Low (CMOS scale) | High (III-V specialty) |
| Integration density (passives) | Very high | Lower (~10x larger waveguides) |
The economic stakes: SiPho on 300mm gives ~9x the die area of comparable III-V wafers and targets under $0.10/Gbps at volume versus $1-10/Gbps traditional. SiPho transceiver market share is projected to grow from ~22-24% (2022) to 44-45% by 2028. The industry converges via heterogeneous integration — bonding unprocessed InP epitaxial layers onto SOI and fabricating lasers post-bond (Intel die-to-wafer bonding achieved CWDM4 lasers with 0.3 nm wavelength std-dev), or micro-transfer printing pre-fab InP gain coupons onto silicon (imec/X-Celeprint, targeting risk production 2027), or InP-on-Si engineered substrates (Soitec InPOSI, OKI tiling). Regardless of approach, every SiPho transceiver remains fundamentally dependent on InP for its light source.
Why InP and SiGe are irreplaceable — the materials physics
InP is the only material that emits at telecom wavelengths because it has a direct bandgap (~1.35 eV) — conduction-band minimum and valence-band maximum at the same crystal momentum, so electron-hole recombination emits a photon directly, no phonon required. Ternary/quaternary alloys grown epitaxially on InP — In₀.₅₃Ga₀.₄₇As (~0.74 eV), InGaAsP, InAlGaAs — are lattice-matched while their bandgaps tune continuously across 0.74-1.35 eV, covering the O-band (1310 nm, ~0.95 eV) and C-band (1550 nm, ~0.80 eV). Components built on InP: DFB lasers (>40 dB side-mode suppression, 10-40 mW), EMLs (200G/lane, sub-2V), SG-DBR tunable lasers (Vernier effect, full C-band), SOAs (15-40 dB gain — "the transistor of photonics," impossible in silicon), and InP MZMs (VπL just 1-3 V·mm, ~10x more efficient than silicon's free-carrier plasma dispersion at 10-25 V·mm).
SiGe / Ge fills the gaps InP can't reach economically. Pure germanium has a 0.66 eV indirect bandgap with a direct gap at 0.80 eV (only 140 meV higher), making it strongly absorptive at 1550 nm. Ge-on-Si photodetectors (despite a 4% lattice mismatch) achieve 0.8-1.16 A/W responsivity with >100 GHz bandwidth in production (imec demonstrated 106 GHz at 0.93 A/W in the O-band; a record 265 GHz via a Ge-fin structure). The tradeoff is dark current: ~100 nA for Ge-on-Si versus ~1 nA for InP, from threading dislocations. SiGe BiCMOS (GlobalFoundries 9HP/90nm, Tower SBC18H5/180nm, ST BiCMOS55X/55nm) delivers TIAs and drivers with fT/fmax up to 370 GHz — enough for 100+ Gbaud PAM4 — on mature 200-300mm CMOS economics. Tower claims >50% market share in TIAs and drivers for datacom transceivers. The clean division: InP can emit, amplify, modulate, and detect on one chip; SiGe/Ge can detect and drive electronics but cannot generate a single photon; SiPho can route and modulate on huge wafers but must import photons from InP. A modern transceiver combines all three — InP lasers, SiPho passives with Ge detectors, SiGe BiCMOS drivers.
The 6-inch InP transition — the biggest cost lever in III-V
The wafer-size gap is InP's single largest cost disadvantage. Most InP lasers run on 4-inch wafers (~44% share, holding ~43.72% in 2025) with legacy 3-inch lines still operating, while SiPho runs 200-300mm — a 300mm silicon wafer has ~16x the usable area of a 76mm (3-inch) InP wafer and ~4x a 150mm InP wafer. Scaling InP is fundamentally harder than silicon: InP decomposes at its 1062°C melting point under phosphorus vapor pressure (it vaporizes as it tries to melt), forcing high-pressure Liquid Encapsulated Czochralski (LEC) with B₂O₃ encapsulant or Vertical Gradient Freeze (VGF) growth. Larger boules magnify thermal stress, twinning, and dopant non-uniformity; InP is far more brittle than silicon, so wafers crack during handling — mechanical fragility is considered a fundamental restraint above 6 inches. Native InP defect densities are 10³-10⁵ cm⁻² (10-1000x silicon's <100 cm⁻²); the best VGF-VB hybrid achieved ≤300 cm⁻² etch pit density on 4-inch in 2025.
The economics for those who execute the transition: 4x more devices per wafer and >60% die-cost reduction moving 3-inch to 6-inch. For a typical EML die (~0.5×1 mm), a 3-inch wafer yields ~8,800 gross dies versus ~35,000 on 6-inch; for complex PICs (~2×5 mm), ~420 versus ~1,720. Coherent built the world's first 6-inch (150mm) InP fabs (Sherman, Texas + Järfälla, Sweden, March 2024), reportedly with yields already exceeding mature 3-inch lines (validation that the per-die economics hold), and received $33M in CHIPS Act funding. Epitaxial uniformity on larger wafers needs new MOCVD tools — AIXTRON's G10-AsP Planetary Reactor for 150mm InP achieved 33 ppm center-to-edge lattice mismatch and 0.07% growth-rate std-dev. MOCVD itself runs toxic phosphine (PH₃) with a TLV-TWA of just 0.3 ppm (IDLH 50 ppm), requiring remote gas detection, scrubbers, and SCBA response — a real barrier. Alternative epitaxy is MBE (ultra-high vacuum, sharpest interfaces, slow and expensive) versus MOCVD (chemical precursors — trimethylindium, trimethylgallium, phosphine, arsine — at production speed; dominates volume).
The EML butt-joint — the hardest yield problem
An EML needs different quantum-well structures for its two sections: the laser section uses 5-6 quantum wells tuned to ~1.53 μm, the modulator section needs 12 quantum wells tuned to ~1.47 μm. The "butt-joint" is where they physically meet. Fabrication requires multiple epitaxial cycles — grow laser QWs across the wafer, pattern and etch them out of the modulator region, then regrow the modulator QWs in the etched area. Regrowth is brutal: air exposure between steps oxidizes/contaminates the interface, incomplete cleaning leaves non-radiative recombination centers, etch damage roughens surfaces causing 0.2-0.5 dB scattering loss, and the lattice discontinuity generates misfit dislocations. These defects cause junction loss (target <0.1 dB, typically 0.2-0.5 dB achieved), back-reflections up to 0.8% destabilizing the laser, and reliability degradation. EMLs are categorized as "high-cost components" specifically because of butt-joint regrowth. Alternatives — Selective Area Growth (SAG), Quantum Well Intermixing (QWI) — modify bandgaps in a single epitaxy run but sacrifice optimization flexibility.
Micro-ring vs Mach-Zehnder — why rings win for dense DWDM
The defining question for photonic integration: how do you modulate 8 different wavelengths on a single bus waveguide? The answer explains why micro-rings, not MZIs, dominate modern DWDM transmitters and why NVIDIA's architecture matters.
MZI modulators are broadband — every wavelength passing through experiences the modulation equally — with 5-7 dB insertion loss per device and 0.5 mm to 6 mm length (free-carrier absorption in doped silicon). Cascading 8 MZIs in series to modulate 8 DWDM channels means every wavelength sees all 8 modulators: 8 × 5-7 dB = 40-56 dB total loss, attenuating the signal 10,000-400,000x. Completely unworkable.
Micro-ring resonators (MRR) are wavelength-selective notch filters: a circular waveguide of just 5-20 μm radius couples to the straight bus, and light at the ring's resonant wavelength (set by circumference and effective index) couples in and circulates while non-resonant wavelengths pass straight through with minimal interaction. Modulation shifts the resonance via carrier depletion. On-resonance loss is 2-3 dB per ring; off-resonance pass-through is just 0.2-0.5 dB per ring. So 8 cascaded rings cost ~1.6-4 dB total pass-through (8 × 0.2-0.5 dB) plus 2-3 dB per modulated channel — roughly 3-5 dB total, entirely manageable. Rings also win on power: 1-10 fJ/bit versus MZI's 50-500 fJ/bit, a consequence of resonant enhancement reducing drive voltage and the tiny capacitance of μm-scale devices versus mm-scale phase shifters. Crucially, micro-ring architectures require one-half to one-quarter the InP content of competing MZI/EML solutions, because low insertion loss preserves the optical budget and enables lower-power DFB lasers and fewer of them (NVIDIA claims 4x fewer lasers per unit bandwidth).
The ring catch is thermal sensitivity. Resonance shifts ~0.1 nm per kelvin — a ring with Q-factor ~15,000 goes off-resonance with just 1°C change. Each ring needs an integrated heater, temperature sensor, and closed-loop control. The hard part is that thermal stability with one ring active is not the same as thermal stability with all rings active dumping noise into each other. Solutions involve liquid cooling, aluminum heat shields over the PIC, and deep photonics-electronics co-design. Silicon's high thermo-optic coefficient (80 pm/K) is what makes this active temperature control mandatory; III-V offers better thermal stability but loses on integration density.
Co-Packaged Optics (CPO) and the move of optics into the package
CPO embeds the optical engine directly next to (or on) the switch/compute ASIC, eliminating the pluggable module and its electrical retiming. The driver is power: network power is climbing from ~5% to 15-20% of datacenter capex, and at 100,000+ GPU scale the pluggable power budget becomes untenable. CPO reduces optical power from ~30W to ~9W for a 1.6T link, roughly 3.5x better power efficiency (some sources 70% reduction), and NVIDIA also cites 63x greater signal integrity, 10x better network resiliency, and 1.3x faster deployment versus pluggables. OIO (Optical I/O) is the application-side view — chip-level optical interfaces for compute with strict <5ns latency and ~5 pJ/bit power targets (Ayar Labs demonstrated 32G × 8-wavelength at the 5 pJ/bit target); CPO is the packaging-side view, operating at 20-30W for 1.6T modules with network-class latency tolerance up to 20ns and 100m-1km reach. Microsoft's framework splits the two: compute-class OIO prioritizes latency/power for AI workloads; network-class CPO targets traditional networking.
TSMC COUPE (Compact Universal Photonic Engine) is the leading production 3D integration platform. It uses SoIC-X bumpless copper-to-copper hybrid bonding to fuse an Electronic IC (EIC, N6/N7) directly onto a Photonic IC (PIC, N65/65nm), achieving bond pitch below 10 μm — 5x denser than conventional microbumps — for the lowest-impedance die-to-die interface. The PIC layer achieves waveguide propagation loss <0.01 dB/cm, 90-degree bend loss <0.001 dB, and grating-coupler insertion loss of 0.3 dB with ±10 μm alignment tolerance (vertical EPIC-BOE coupler hits 0.08 dB, sustaining 300 mW laser input 3+ hours without degradation). The COUPE roadmap runs three generations, skipping 3.2T: Gen 1 pluggable 1.6T OSFP engine (sampling Q4 2024, mass production 2H26); Gen 2 CPO-on-CoWoS at 6.4T (samples early 2026, mass production late 2027-early 2028); Gen 3 on-package optical I/O at 12.8T (pathfinding). It supports both MRM (200G PAM4/wavelength, high density) and MZM (high-speed/high-power) plus WDM on a single fiber. The broader architecture progression is pluggable → LPO → near-package optics (NPO) → CPO → on-package optical I/O.
NVIDIA's 1.6T optical engine uses 8 micro-ring modulators on a single bus waveguide, each tuned to a different DWDM wavelength at 200 Gbps PAM4: 8 × 200G = 1.6 Tbps. The Quantum-X800 InfiniBand switch packs 6 optical subassemblies × 3 optical engines (4.8 Tbps per subassembly, 28.8 Tbps full-duplex per ASIC); the Q3450 system delivers 144 ports × 800 Gbps = 115.2 Tbps. External Laser Source (ELS) modules — 18 per switch with 8 wavelengths each — provide field-replaceable light, so the photonic engine only modulates and detects. Broadcom's Tomahawk 6 "Davisson" is the first 102.4 Tbps CPO Ethernet switch: 16 × 6.4 Tbps COUPE optical engines, 64 Condor 3nm SerDes cores (8 × 212.5 Gb/s PAM4 each), 800 Gbps port power of just 3.5W, with field-replaceable ELSFP laser modules. Broadcom's CPO lineage runs Humboldt (TH4, 2021, Tencent) → Bailly (TH5, 2023, Meta) → Davisson (TH6, Oct 2025).
The unresolved debate: every generation, CPO proponents say "this is the last pluggable," and every generation pluggable wins on flexibility and serviceability. Skeptics argue CPO economics don't flip versus pluggable until 3.2T (2028+); bulls say 1.6T (2026-27). CPO market forecasts: ~37% CAGR to ~$20B by 2036 (IDTechEx), or from ~$15M (2023) to $49M (2028) then $8.1B (2030) on a steeper curve, with CPO components projected >$60B by 2030 on the most aggressive read. The scaling crisis driving all of it: over 20 years compute performance surged 60,000x while memory bandwidth grew only 100x and I/O bandwidth just 30x, and copper hits a wall at ~200 Gb/s per lane.
Optical Circuit Switching (OCS) — switching light without converting it
A different architectural lever: instead of faster transceivers, change how the fabric switches. Traditional electrical packet switches do optical-electrical-optical (OEO) conversion at every hop — light to electrons, parse packet-by-packet, buffer, forward on header lookup, back to photons. An OCS physically redirects light from input fiber to output fiber with movable mirrors — no conversion, no parsing, no buffering. It's a programmable optical patch panel reconfigurable in milliseconds. The enabling tech is 3D MEMS: two arrays of microscale mirrors (hundreds of μm across) face each other across a free-space cavity, each tilting on two orthogonal axes via electrostatic actuation; a collimator array converts the diverging fiber beam to parallel, the input mirror steers it to the right output mirror. Only 2N mirrors for an N×N switch (versus N² for 2D MEMS), enabling 300+ ports at <3 dB insertion loss. OCS is entirely protocol-agnostic and data-rate transparent — the same switch works with 400G, 800G, 1.6T, 3.2T because it never touches the signal electrically — and consumes ~28x less power (a 136-port electrical switch ~3,000W versus Google's 136-port OCS at 108W). The tradeoff: no packet-level intelligence (it creates circuits, not routes), needs an external SDN control plane, and switches at millisecond scale — adequate for sustained AI training flows, not microsecond packet decisions. Alternative OCS technologies include piezoelectric beam-steering (Polatis/Huber+Suhner, holds dark fiber without light), digital liquid crystal (Coherent DLX), and robotic fiber switching (Telescent, minutes-scale but <1 dB loss). Company-specific OCS detail lives on LITE.
The unit economics and cost structure — why this is a hard business
Optical is structurally a worse business than electronics, and the reasons are physical. Alignment dominates cost: ~80% of photonic IC cost is consumed in alignment processes, requiring submicron precision to tens of nanometers — far tighter than electronic tolerances — so most optical manufacturing still relies on manual, custom, non-scaling processes. Testing is brutal: semiconductor testing is ~10% of component cost, but silicon photonics testing can consume 60-90% of product cost due to optical alignment, with customers building their own in-house test environments for lack of standards. Packaging is up to 80% of module cost versus <50% for traditional electronics. The value-capture math is unforgiving: photonics-enabled systems markets are massive ($920B growing toward $2T by 2035), but component suppliers capture only ~1/12th of total market value, and they consistently rank at the bottom of the communications supply chain for margin — small relative to customers, no pricing power. Photonics firms generate $217K-390K revenue per employee versus $500-630K for semis and software. Capital intensity is high (crystal growth equipment, Class-100 cleanrooms, $100M+ for public listing), and R&D is a continuous drain across 30+ microverticals with long pre-revenue cycles.
Where value actually concentrates in the chain: the coherent DSP node earns 50-70% gross margins (a multi-hundred-million-dollar development program, only a handful of firms, mostly TSMC-fabbed) — the highest-value node. Component layer is moderate margin and commoditizing. Subsystem/engine layer is high margin for proprietary engines, low for merchant pluggables. Equipment OEMs run 35-50% gross but 15-25% R&D intensity. The structural divergence: SiPho fabless players grow 25-45% CAGR with software-like economics (front-loaded R&D, then design replication) but greater execution risk and pre-profitability; traditional vertically-integrated optical firms grow ~10% with proven cash flow but face commodity pricing and share erosion. Lithium niobate modulators (1-2V) and InP lasers (>20% wall-plug efficiency vs ~10% for hybrid integration) keep III-V ahead on raw performance; SiPho wins on integration density and cost scaling.
Moats — what makes this defensible despite the bad unit economics
The moats are real even though the average business is hard. Customer qualification cycles run 12-24 months covering reliability testing (Telcordia GR-468), environmental stress screening, and field trials — and CPO requires multi-year trial cycles. Once qualified, switching costs are high because re-qualifying a new supplier is expensive and risky, creating strong incumbency. Medical OCT applications add FDA qualification on top. Manufacturing precision is a moat: wavelength accuracy to picometer levels for DWDM, surface flatness in fractions of a wavelength (nm), submicron fiber-coupling alignment, Class-100+ cleanrooms, and interdisciplinary expertise spanning material science, optical design, and semiconductor processing — the gap between lab prototype and high-yield production is enormous. IP: tunable laser cavity/tuning designs, ROADM/WSS platforms, SG-DBR architectures, and coherent patent thickets force new entrants to license or design around. Foundry scarcity: open-access SiPho foundries are limited, and the firms with 6-inch InP, 300mm SiPho, and hybrid-bonding capacity hold the picks-and-shovels position. The 200G VCSEL reliability question is its own moat boundary — VCSELs dominate at 100G/lane but their ability to scale to 200G/lane is the sharpest technical disagreement in the industry (the world VCSEL leader, Broadcom, stopped at 100G/lane), which is why EML and SiPho architectures dominate 1.6T production until anyone shows GR-468-qualified 200G VCSEL data.
Adjacent optical technologies that share the same physics
The same component physics feeds two adjacent markets. OCT (Optical Coherence Tomography) uses low-coherence interferometry — splitting a broadband or swept-wavelength source into a reference arm and a sample arm, then reconstructing depth from interference patterns — to image beneath surfaces at 1-15 μm resolution (10-100x better than ultrasound). Swept-Source OCT (SS-OCT) uses a rapidly tunable laser; it is the standard of care in ophthalmology and an emerging tool in semiconductor metrology (non-destructive wafer/packaging inspection). Quantum photonics uses single photons as qubits at room temperature (no cryogenics), drawing on the same tunable lasers, detectors, beam splitters, and LCOS spatial light modulators. Both demonstrate that the precision-optics manufacturing base (tunable lasers, OSAs, WSS, LCOS, T&M equipment — heavily Japanese, ~30% of global photonics manufacturing) is the common substrate beneath datacom, telecom, medical, and quantum.
Company-specific competitive positions, market-share figures, valuations, and stock theses live on the ticker pages — COHR, LITE, TSEM, FN, MRVL, AVGO, 6777, 6855, 6834, 5802, AIXA, SOITEC, AXTI, 5801 — and in the analyst-views-optical-transceiver, optics-companies-challenges, and inp-sige-photonic-materials research notes.
Subsectors
Optical networking and photonics is not one market — it is a stack of distinct sub-areas that share a physical medium (light in glass) but diverge sharply in technology, customer base, margin structure, and investment risk. The sub-areas below run from the highest-volume product (pluggable transceivers) through the components and materials that feed them, out to the carrier-grade transport and wireless equipment that share the same supply chain. Where a sub-area is best expressed through a specific company, the company page carries the deep dive; this section stays industry-wide.
Transceivers & pluggables
The optical transceiver is the highest-volume, highest-revenue product in the optical supply chain — the module that bridges the electrical and optical domains. Inside every transceiver: a transmitter optical subassembly (TOSA) and receiver optical subassembly (ROSA), built from a laser source (DFB, EML, or VCSEL), a modulator, a photodetector, and — in most modules today — a DSP. Modules plug into switch and router ports in standardized form factors: QSFP-DD and OSFP at 800G, OSFP224 / OSFP-XD at 1.6T (8×200G PAM4). Form factor at 1.6T has converged on OSFP224 with 8×200G PAM4 lanes.
The speed ladder is the spine of the whole sector: 400G (mature, volume) → 800G (current AI-cluster standard, ramping) → 1.6T (2026 is the "Year of 1.6T," 8×200G or 4×400G) → 3.2T (R&D, ~2029-2030, expected to force co-packaged optics). Each generation is reached by lane parallelization — multiplying parallel channels (e.g., 8×200G = 1.6T) rather than making individual channels faster. PAM4 (4-level, 2 bits/symbol) is the standard datacenter modulation; the lane rate has climbed to 200G/lane.
The market is large and inflecting on AI. Total transceiver market was roughly flat at $11.0B (2022) → $10.9B (2023), then AI infrastructure transformed the trajectory: ~$17B (2024E), $22-25B by 2029E at 15-16% CAGR. AI-cluster optics specifically run ~$2B (2023) → $5B (2024) → $10B+ (2029) at ~38% CAGR. LightCounting projected 57% growth in 2024 and 62% in 2025, moderating to 20% by 2026. 400G/800G shipments exceeded 20 million units in 2024 (~$9B revenue); the 1.6T generation is expected to hit 10 million units in just 4 years versus a decade for 100G. 800G shipments hit 24 million units in 2025, projected to reach 63 million units in 2026 — a 2.6× jump. Raymond James projects AI backend transceivers at $22.2B by 2030 (30% CAGR), with pluggable revenue of $15.3B in 2025 and $19.5B in 2026. NVIDIA Blackwell GPUs require ~2 800G transceivers per GPU; H200 requires ~2.5 800G transceivers per GPU; the scale-out ratio remains 1 OSFP port per GPU. GB200 1.6T transceivers cost ~$850 each at ~30W; per-rack transceiver costs of $550,800 translate to $2.2M to customers at NVIDIA's 75% margin target.
Who plays: module assembly is dominated by Chinese manufacturers — InnoLight (Zhongji, ~18% share, dominant in 800G for NVIDIA GB200, holds 50%+ wallet share of NVIDIA optical-module procurement, shipped 3 million silicon photonics transceiver modules in 2024) and Eoptolink (rising), with Accelink and HG Genuine also climbing the value chain; together InnoLight and Eoptolink hold 60%+ of NVIDIA's 800G volume. Western/vertically integrated players: COHR (Coherent, 20-25% transceiver share, #1 in 800G module shipments 2024) and Broadcom (15-20% share). FN (Fabrinet) is the dominant outsourced module-assembly partner (~50% share of outsourced optical-comms manufacturing; cited at "100% Blackwell platform market share for 1.6T transceivers"; NVIDIA 28% of FY2025 revenue, Cisco 18%, plus an Amazon warrant deal). The investment angle is bifurcated: module assembly is a commoditizing, margin-thin layer (China-led), while the laser/DSP/PIC content inside the module is where value concentrates. The cautionary thread across sources — see optics-companies-challenges — is that even AI-boom transceiver makers disappoint on guidance (Coherent crashed 20% after beating Q2 2025 earnings because Q3 guidance missed by 0.6%); component suppliers historically capture only 1/12th of total system market value.
Silicon photonics / co-packaged optics (CPO)
Silicon photonics (SiPho) builds optical functions — modulators, waveguides, multiplexers, Ge photodetectors — on silicon-on-insulator (SOI) wafers (typically a 220nm Si device layer on 2µm buried oxide) using modified CMOS processes on 200-300mm wafers. The economic case is decisive: ~9-16× the usable die area of III-V wafers, fifty years of CMOS yield optimization, targeting under $0.10/Gbps at volume versus $1-10/Gbps for traditional discrete approaches. The catch silicon can never overcome: silicon's indirect bandgap means it cannot emit light, so every SiPho transceiver still imports its photons from an external InP laser. SiPho's share of the transceiver market is projected to grow from ~22-24% (2022-2023) to 44-45% by 2028 (LightCounting). The Silicon PIC market alone: Yole projects $95M (2023) → $863M+ by 2029 at 45% CAGR; broader SiPho market forecasts run $2.65-2.69B (2024-25) → $9.65-15.83B (2030-2032) at 25-30% CAGR.
CPO (co-packaged optics) is the architectural endgame: embed the optical engine directly next to the switch ASIC (or compute die), eliminating pluggable modules. The payoff is power and density — NVIDIA CPO claims 9W per 1.6T port versus 30W for pluggables (3.5× power efficiency), plus 10× network resiliency, 63× signal integrity, 4× fewer lasers. CPO market: ~$15M (2023) → $49M (2028) → $5-8.1B by 2030, with longer forecasts of $20B by 2036 at 37% CAGR (IDTechEx). A key distinction (Microsoft's framework, network-fundamentals): OIO (Optical Input/Output) is the compute-class variant — <5ns latency, ~5 pJ/bit, chip-level optical interface for AI workloads (Ayar Labs' 32G×8-wavelength at 5 pJ/bit); CPO is the networking-class variant — 20-30W for 1.6T, ~20ns latency tolerance, 100m-1km reach. There is also NPO (near-package optics) as an intermediate step. The recurring tension across optical-components-primer and the CPO-vs-pluggable debate: every generation, CPO proponents declare "this is the last pluggable," and every generation pluggable wins on flexibility and serviceability — skeptics (Ayar Labs analysis) argue the economics don't flip until 3.2T.
The signature technology debate is micro-ring modulator (MRM) versus Mach-Zehnder (MZI). Ring modulators are wavelength-selective notch filters with 5-10µm radii; each ring modulates only its resonance wavelength and lets others pass at 0.2-0.5 dB, so 8 rings can be cascaded on one bus waveguide for ~3-5 dB total loss. MZIs are broadband (5-7 dB each), so cascading 8 for DWDM would create 40-56 dB cumulative loss — unworkable. Rings consume 1-10 fJ/bit versus MZI's 50-500 fJ/bit. The catch is thermal sensitivity (~0.1nm/K resonance shift; a Q~15,000 ring goes off-resonance with a 1°C change), requiring integrated heaters and closed-loop control. NVIDIA's MRM architecture requires roughly one-half to one-quarter the InP content of competing MZI/EML solutions — a structural cost and supply advantage. silicon-photonics-ai-datacenters and tsmc-coupe-silicon-photonics carry the physics in full.
Foundries are the picks-and-shovels layer. The contenders: TSEM (Tower Semi — PH18 200mm platform in volume, 300mm SiPho released Nov 2024 with "best-in-class waveguides," >50% market share in TIAs/drivers, serves 7 of top 11 datacom transceiver makers; 2024 SiPho revenue ~$105M tripled YoY, Q4 run-rate >$150M annualized; supplies ring add/drop filters into NVIDIA's ecosystem and SiGe BiCMOS for TIAs/drivers; also primary foundry for active copper cables in Blackwell racks); GFS (GlobalFoundries — Fotonix 45nm-CMOS-based 300mm monolithic platform, design wins claimed across Broadcom/Cisco/Marvell/NVIDIA/Ayar/Lightmatter, $3B R&D + $575M packaging commitment, CHIPS Act support); and TSMC's COUPE. Several independent analysts (Irrational Analysis, SemiAnalysis) favor Tower over GlobalFoundries on execution and order traction, and judge TSMC's legacy SiPho process weak — but TSMC's COUPE has won the NVIDIA and Broadcom CPO sockets (see below). INTC (Intel) historically led datacom SiPho at 61% share (8M+ PICs shipped, 32M+ on-chip lasers) but divested pluggable modules to Jabil. Fabless SiPho design houses — Ayar Labs ($372M funding, >$1B valuation), Lightmatter ($850M raised, $4.4B valuation), Celestial AI — chase OIO/CPO with asset-light models. The structural tension SiPho creates for the rest of the sector (optical-components-primer risk section): if CPO consolidates the supply chain around a few SiPho foundries, demand for discrete components and discrete-optics test equipment shrinks.
TSMC's COUPE (Compact Universal Photonic Engine) deserves its own note as the dominant CPO integration platform. It uses SoIC-X bumpless Cu-Cu hybrid bonding to stack an Electronic IC (N6/N7, e.g., TIA/driver/control) directly on a Photonic IC (N65) at sub-10µm pitch (5× denser than microbumps). Optical specs: waveguide loss <0.01 dB/cm, 90° bend loss <0.001 dB, grating-coupler insertion loss ~0.3-1.2 dB with ±10µm tolerance, vertical coupler 0.08 dB sustaining 300mW for 3+ hours. Three-generation roadmap: Gen 1 pluggable 1.6T OSFP engine (sampling Q4 2024, mass production 2H26); Gen 2 6.4T CPO-on-CoWoS with switch ASIC (samples early 2026, mass production late 2027-early 2028); Gen 3 on-package 12.8T optical I/O (pathfinding, no date). TSMC filed 50 US SiPho patents in 2024 (double Intel's 26) and is ~1-2 years ahead of Intel. The two anchor CPO sockets built on COUPE: NVIDIA's Quantum-X Photonics (InfiniBand, 28.8 Tbps full-duplex per switch ASIC, Q3450 = 115.2 Tbps over 144 ports) and Spectrum-X Photonics (Ethernet, 2H26); and Broadcom's Tomahawk 6 "Davisson" (BCM78919) — industry's first 102.4 Tbps CPO Ethernet switch, 16×6.4 Tbps COUPE optical engines, 70% optical-interconnect power reduction, shipping to early-access customers since Oct 2025. Broadcom's CPO lineage: Humboldt (TH4 CPO, 2021, Tencent) → Bailly (TH5 CPO, 2023, Meta) → Davisson (TH6 CPO, 2025).
DSP-to-LPO / coherent optics
This sub-area is defined by a single architectural shift: where does the signal-conditioning DSP live, and can it be removed? The transceiver DSP performs FEC, equalization, and impairment compensation — and consumes ~50% of a pluggable module's power (~4W at 400G, 12-13W at 800G) and 20-40% of module cost ($50-70 of BOM). As 800G/1.6T modules hit ~30W thermal limits, the DSP is the obvious target.
LPO (Linear Pluggable Optics) eliminates the DSP entirely, letting the host switch ASIC's SerDes directly drive the optical components. Documented benefits: 25-50% power reduction (14W → <8W for 800G; sources cite 25-40% and 40-50%), up to 90% latency reduction, and the BOM cost savings of dropping the DSP. LRO (Linear Receive Optics, also "Linear Reach Optics") is the hybrid compromise — DSP retained on transmit, removed on receive — for ~50% power savings; Fabricated Knowledge flagged LRO as "all the talk" in 2024, enabled by the quality of Broadcom's Tomahawk 5 SerDes ("best SerDes in the game today"). The LPO MSA has 50+ networking-industry members; Dell offers end-to-end LPO with Broadcom Thor 2 NICs; LightCounting projects LPO/CPO at high volume by 2028, scale-up networks accelerating 2026-2027.
Coherent optics is the long-reach branch of the same family — and the technology that runs metro and long-haul transport. Coherent detection modulates amplitude, phase, AND polarization simultaneously (versus direct-detect intensity-only), using a narrow-linewidth tunable laser, a dual-polarization IQ modulator, a local-oscillator laser at the receiver, and a heavy DSP for dispersion/PMD/phase-noise compensation. The modulation-format/reach tradeoff: DP-QPSK (4 bits/sym, 3,000+ km) → DP-16QAM (8 bits/sym, 500-1,000 km) → DP-64QAM (12 bits/sym, <200 km DCI), tuned continuously via probabilistic constellation shaping (PCS). Per-wavelength capacity has gone from 40-100G (2008, 65/40nm DSP) to 800G-1.6T (2024-26, 5/3nm DSP, 140+ Gbaud) — ~40× since 2008 with 95%+ better power per bit. ZR/coherent pluggables (OIF 400ZR: 400G, QSFP-DD/OSFP, ~80-120km, 16QAM, interoperable; 400ZR+ extends to 500-2,000km; 800ZR in development) are displacing proprietary line-side transponders — coherent pluggables drove all telecom bandwidth growth in 2024, and metro is expected to be >60% of coherent-pluggable shipments by 2026 (Dell'Oro: 800ZR/ZR+ >1/3 of IPoDWDM revenue by 2026).
Who plays: MRVL (Marvell) is the merchant DSP champion (Orion/Nova coherent DSPs, the 400ZR/ZR+ ecosystem, the pluggable PAM4-DSP business) — and the most threatened by LPO/LRO and by NVIDIA's internal DSP (NVIDIA "taped out a 1.6T DSP"). Several independent analysts are explicitly short MRVL on this structural risk. Broadcom competes in merchant coherent DSP and supplies the Tomahawk SerDes that makes LPO/LRO possible. Credo (Credo Semiconductor) is the LPO/LRO pure-play champion (Dove 850 for 800G; founded 2008, Walden International-backed). MXL (MaxLinear) and Semtech round out the US analog/DSP layer. The vertically integrated transport vendors design their own coherent DSPs — Ciena (WaveLogic), Nokia (PSE + Infinera ICE), Cisco (Acacia) — covered under telecom equipment below.
Optical components & instruments (WDM, lasers, ROADMs, test & measurement)
This is the discrete-component layer feeding the transceiver and transport markets, plus the test & measurement equipment used at every layer. The foundational technology is WDM — putting many wavelengths down one fiber. CWDM (coarse, 20nm spacing, ≤16-18 channels, uncooled lasers, ~80km, cheap) versus DWDM (dense, 0.8nm/100GHz or 0.4nm/50GHz spacing, 40-96+ channels in C-band extending to L-band, precision temperature-controlled lasers, EDFA-amplifiable, hundreds-to-thousands of km). A single DWDM fiber pair can carry 96 wavelengths × 800G = ~76.8 Tbps, roughly doubling with L-band. The industry sits within 2-3× of the Shannon limit on standard single-mode fiber.
Active components: DFB lasers (single-frequency coherent sources, MHz linewidths via Bragg grating, 10-40mW); EMLs (electro-absorption modulated lasers — DFB + modulator monolithically on InP, the most successful InP PIC ever, 200G/lane at sub-2V drive); tunable lasers (one SKU replaces 80+ fixed-wavelength lasers; external-cavity ECTLs, SG-DBR, MEMS-VCSEL; essential as coherent local oscillators); VCSELs (vertical-cavity, dominant at 100G/lane short-reach — but whether they scale to 200G/lane is the sharpest technical dispute in the sector, with Broadcom, the VCSEL world leader, having stopped at 100G/lane; Yole sees 200G VCSEL mass production no earlier than 2026); SOAs (semiconductor optical amplifiers, the "transistor of photonics," 15-40 dB gain, impossible in silicon); MZ modulators; photodetectors (PIN and APD).
Passive/network-management components: optical channel monitors (OCM); wavelength selective switches (WSS, LCOS-based, the building block of reconfigurable networks); ROADMs (built from WSS — colorless/directionless/contentionless CDC and flex-grid CDC-F variants — remotely add/drop/pass wavelengths without electrical conversion); optical amplifiers (EDFA, the C/L-band workhorse; Raman, lower-noise fiber-as-gain-medium for ultra-long-haul/submarine); MUX/DEMUX; optical line systems (OLS). And optical circuit switches (OCS) — 3D-MEMS or piezo/liquid-crystal/robotic switches that physically redirect light with no OEO conversion, protocol-agnostic and data-rate-transparent; a comparable 136-port electrical switch draws ~3,000W versus ~108W for Google's 136-port OCS (28× reduction). OCS is a distinct, fast-emerging niche — Cignal AI sizes it at $2.5B by 2029 against a ~20-vendor field; LITE (Lumentum R300 300×300 / R64) carries the deep dive.
Test & measurement is the cross-cutting instruments layer — tunable lasers, optical spectrum analyzers (OSA), power meters, IL/RL meters, OCMs — needed at every value-chain layer for R&D, production validation, and field commissioning. Market ~$1.0-1.7B (2025) at ~4.4% CAGR. Players: KEYS (Keysight) and VIAV (VIAVI) hold ~30% of the optical-test market together; EXFO (Canada); plus Japanese specialists 6754 (Anritsu), Yokogawa, and 6777 (Santec — tunable lasers for T&M, LCOS components/SLMs/WSS submodules, swept-source OCT). OCT (optical coherence tomography) is an adjacent application — medical imaging today (ophthalmology, intravascular), with semiconductor metrology (advanced-packaging inspection: FOWLP/SiP/3D-IC) and quantum photonics as emerging frontiers; SS-OCT laser market leaders are Santec, Excelitas (Axsun), Thorlabs, Anritsu, Topcon, Exalos (>60% combined).
Tunable-laser leaders overall: LITE (Lumentum), COHR (Coherent), Keysight, Santec, NKT Photonics. The dominant laser-source suppliers inside transceivers are Lumentum and Coherent (DFB, EML, tunable). Japan holds ~30% of global photonics manufacturing by HQ — a friend-shoring thesis runs through Santec, 6855 (JEM connectors), 6834 (Seikoh Giken APC connectors), 5802 (Sumitomo Electric ultra-low-loss/multi-core fiber). Fiber itself (GLW Corning) is a related component sub-area. The investment caution (optics-companies-challenges): this is a fragmented, capital-intensive, low-revenue-per-employee layer (~$217-390K vs $500-630K for semis/software), where ~80% of PIC cost is alignment, SiPho testing can be 60-90% of product cost, qualification cycles run 12-24 months (Telcordia GR-468), and the historical graveyard (JDS Uniphase's $50.6B loss, Nortel) is a standing warning.
Datacenter networking fabrics
The fabric is the network architecture that wires GPUs together, and it sets the demand curve for everything above. Generative-AI clusters need 10-100× more fiber than traditional cloud; backend AI networks account for ~85% of networking cost and ~86% of networking power in modern GPU clusters. The architecture splits into backend (the GPU-to-GPU fabric — InfiniBand or Ethernet) and frontend networking, with a transceiver/cable BOM at each layer.
The protocol contest (primer-networking-optics, network-fundamentals): InfiniBand (RDMA, ultra-low latency, NVIDIA Quantum switches; optimal for synchronous training, weaker for variable inference); RoCE (RDMA over Converged Ethernet, ConnectX NICs, hybrid training+inference); and plain Ethernet (versatile, standard). The compute-scale-up layer — NVLink — and the copper-vs-optics boundary matter: NVL72 uses copper NVLink for in-rack scale-up, which sparked the "Optical Boogeyman" fear that copper would cut optical demand; SemiAnalysis showed the scale-out ratio holds at 1 OSFP port per GPU. Short reaches are contested by AEC (active electrical cables) and DAC (direct-attach copper) — copper is limited to ~2m at PAM4 datacenter rates; ACC (active copper cables) are used extensively in NVIDIA Blackwell racks.
SerDes evolution underpins the fabric: 100GbE = 4 fiber pairs × 25G; 400GbE = 4×100G; 800G sockets = 4×200G; Broadcom achieved 100G SerDes in labs by 2018. NICs/DPUs are dominated by NVIDIA (Mellanox heritage — InfiniBand pioneer founded 1999, acquired by NVIDIA April 2020 for ~$7B, BlueField DPU, LinkX transceivers 25G-800G, Spectrum-X switches with 144 SerDes lanes + integrated CDR); Broadcom Thor 2 is the alternative; Intel NIC adoption is minimal outside hyperscalers. Switch silicon: Broadcom (Tomahawk PAM4 SerDes), NVIDIA (Quantum/Spectrum), Cisco Silicon One. CDR (clock-and-data recovery) is the fundamental timing primitive inside every SerDes — and MEMS timing (SITM SiTime, 85-90% MEMS-timing share, 20-50× better reliability than quartz, GPU-synchronization clocks) is an adjacent enabler often confused with SiPho but technologically distinct. The OCS-based fabric (Google Jupiter direct-connect via Palomar OCS — 5× capacity, 30% capex cut, 41% power cut, 50× less downtime; Meta TopoOpt 3.4× faster training) is the optical-switching alternative to electrical Clos/fat-tree spines. Watch-list signal-integrity players: ALAB (Astera Labs retimers), Aeluma (PICs), Credo.
Telecom / RAN equipment
The carrier-grade transport and wireless layer shares the optical supply chain but answers to a different buyer (telcos, not hyperscalers) and a different demand cycle (operator capex, deeply cyclical). It splits into optical transport and Radio Access Networks (RAN), a combined ~$60-70B+ annual equipment market.
Optical transport (~$18-20B in 2024, growing ~10-15%, faster than the broader telecom market — AI/DCI is the growth engine) is built from transponders/muxponders (coherent engine converts client 400GbE to a DWDM wavelength), ROADMs, EDFA/Raman amplifiers, and optical line systems, spanning metro, long-haul, submarine, and DCI. The structural shift is pluggable-coherent (400ZR/ZR+) displacing dedicated transponder shelves by plugging directly into routers/switches — cheaper, lower-power, but cannibalizing traditional transponder revenue and the line between DCI and long-haul (networking-notes-discord: ZR+ pushing pluggables into <40km and beyond, threatening Ciena's ~70% inter-DC transponder position). Vendors and their in-house coherent DSPs: CIEN (Ciena — #1 Western DCI/long-haul, ~50% US share, #2 global ~19%, WaveLogic DSP; WL6e demonstrated 1.6T/wavelength over 700km); NOK (Nokia — acquired Infinera Q1 2025 for ~$2.3B, combining PSE + Infinera ICE InP-PIC technology, now the credible Western #2); CSCO (Cisco — Acacia, acquired 2021 for $4.5B, ~50% telecom coherent share, CIM 8); Huawei (#1 global ~33% optical transport, in-house DSP, dominant in China/developing markets, banned in the West); ZTE (#2 China). Merchant DSP (Marvell, Broadcom) feeds the pluggable side against the vertically integrated incumbents.
RAN (~$35-40B annually, flat-to-declining in 2023-24 post-5G-build) is the wireless last mile: antennas/active antenna units, radio units (RU/RRH), baseband (BBU/DU), centralized units (CU). Core technologies: massive MIMO (64T64R panels, the defining 5G leap, 3-5× spectral efficiency), beamforming, sub-6GHz/C-band (which beat mmWave as the primary 5G layer). The structural story is Open RAN (O-RAN Alliance disaggregation of RU/DU/CU via open interfaces — 7.2x fronthaul, F1, E2/A1/O1; ~10-15% of new deployments in 2025, led by greenfield Rakuten/Dish) versus the integrated Big-3-plus-Samsung incumbency: Huawei (~28-30%), Ericsson (~25-28%), Nokia (~18-20%), Samsung (~10-12%), ZTE (~8-10%). AI-RAN (NVIDIA Aerial running 5G L1 on GPUs, dual-use cell sites; NVIDIA + Nokia + T-Mobile anchor pilot) is the speculative frontier. The convergence point with the rest of the sector: every modern 5G cell site needs fiber fronthaul (25-50 Gbps/cell over DWDM), so massive MIMO densification feeds metro-optical demand — and the AI-datacenter buildout drives optical directly and RAN indirectly (the "Physical AI" edge thesis). Full primer: telecom-network-equip.
Photonic materials (InP / SiGe / silicon / SOI / LiNbO3)
Materials are the bottom of the stack and, per inp-sige-photonic-materials, the single biggest bottleneck constraining the industry. The physics is non-negotiable: InP (indium phosphide) is a III-V compound with a direct bandgap (~1.35 eV) — electrons and holes recombine to emit photons directly. Silicon's indirect bandgap (~1.12 eV) makes radiative recombination a ~10⁻⁶-efficiency phonon-assisted process — "not an engineering limitation, it is physics." Every commercial telecom laser is direct-bandgap III-V. InP alloys (In₀.₅₃Ga₀.₄₇As, InGaAsP, InAlGaAs) tune continuously across 0.74-1.35 eV, covering the O-band (1310nm) and C-band (1550nm). On InP you can emit, amplify (SOA), modulate (MZ modulator at VπL 1-3 V·mm, ~10× more efficient than silicon's 10-25 V·mm), and detect — all on one chip.
SiGe / Ge fills the gaps InP can't reach economically. Germanium (0.66 eV indirect, 0.80 eV direct) is strongly absorptive at 1550nm; Ge-on-Si photodetectors (despite 4% lattice mismatch) deliver 0.8-1.16 A/W responsivity at >100 GHz (imec demonstrated 106 GHz; a Ge-fin structure hit a record 265 GHz) — the tradeoff is ~100nA dark current vs ~1nA for InP. SiGe BiCMOS (GlobalFoundries 9HP/90nm, Tower SBC18H5/180nm, ST BiCMOS55X/55nm) delivers TIAs and drivers at fT/fmax up to 370 GHz for 100+ Gbaud PAM4. The division of labor: InP emits/amplifies/modulates/detects; SiGe detects and drives electronics but cannot generate a single photon; SiPho routes and modulates on huge wafers but must import every photon from InP. LiNbO3 (lithium niobate) is the high-performance modulator material (1-2V operation via Pockels effect, chirp-free) used in long-haul transmitters; SiN (silicon nitride) provides ultra-low-loss waveguides (0.1-1 dB/cm) and is being integrated onto SiPho platforms.
The wafer-size gap is the defining economic constraint. Silicon photonics runs on 200-300mm; InP historically on 3-inch (76mm) and 4-inch (100mm, ~44% market share 2024-25), with 150mm just entering production. A 300mm Si wafer has ~16× the area of a 76mm InP wafer. InP is harder to scale: it decomposes at its 1062°C melting point (phosphorus vapor pressure), requiring LEC or VGF growth with encapsulation; it twins frequently; it is brittle above 6 inches (a likely hard ceiling). The 6-inch (150mm) transition is the most consequential manufacturing shift — Coherent built the world's first 6-inch InP fabs (Sherman TX + Järfälla Sweden, March 2024, $33M CHIPS Act funding) claiming 4× more devices per wafer and >60% die-cost reduction, with yields reportedly already beating mature 3-inch lines. Heterogeneous integration is the convergence path: bond unprocessed InP epi onto SOI and fab lasers post-bonding (Intel die-to-wafer, CWDM4 lasers at 0.3nm σ), micro-transfer-printing of InP gain coupons (imec/X-Celeprint, risk production ~2027), InP-on-GaAs (Fraunhofer ISE), InPOSI / InP-on-Si via Smart Cut (Soitec), OKI tiling onto 300mm Si. Epitaxy is grown by MOCVD (volume; trimethylindium/phosphine, with phosphine's 0.3ppm TLV-TWA toxicity driving safety cost) or MBE (sharpest interfaces). The hardest yield problem is the EML butt-joint regrowth (different quantum-well structures for laser vs modulator section, target <0.1 dB but typically 0.2-0.5 dB loss).
The InP supply chain is concentrated and geopolitically fraught — the strategic chokepoint of the whole sector. Substrate market ~$198-210M (2025) → $385-600M by 2031, with InP wafers 10-100× more expensive per area than silicon ($300-800 for a production 4-inch InP wafer vs $25-50 for 6-inch silicon). AXTI (AXT/Beijing Tongmei) controls ~60-70% of global InP substrate via VGF growth in China (InP revenue +250% sequentially Q3 2025, $100M raise Dec 2025) — but China's February 4, 2025 indium export controls force ~60-business-day per-customer permits. 5802 (Sumitomo Electric, Japan) holds ~30% (some sources cite up to 60% if captive output is counted; +40% 6-inch capacity by 2026, fab in Japan so permit-free) — but a large captive fraction (SEDI consumes wafer area for ~16-24M EML chips + ~56-64M CW chips/year) means the addressable ex-China merchant pool is smaller than headline share implies, supporting AXT's strategic value. JX Advanced Metals (Japan), Freiberger (Germany), InPACT (France, ~20% European/American share), IQE (UK) fill the rest; emerging Chinese (Zhuhai Dingtai Xinyuan, Vital Materials) trail on telecom-grade crystal quality. The downstream EML majors — LITE (Lumentum, ~50-60% EML share, only volume supplier of 200G/lane EMLs, demand exceeds supply 25-30%), COHR (Coherent, dual-site 6-inch, #1 800G modules 2024), Sumitomo SEDI, Mitsubishi, Broadcom — are all building captive InP rather than depending on a competitor's substrate. McKinsey sees a meaningful InP laser-supply shortfall in 2026; NVIDIA has pre-allocated EML capacity through 2027. Equipment/substrate-adjacent plays: AIXA (Aixtron — MOCVD, new G10-AsP planetary reactor for 150mm InP, 33ppm center-to-edge mismatch), SOITEC (Soitec — photonics-SOI and InPOSI). The unresolved sector question (optical-components): InP vs SiGe vs SiPho — which platform wins AI-datacenter interconnect, and the answer determines whether the SiPho-foundry bets pay off.
Value chain
The optical networking value chain is unusually deep and unusually disaggregated. Eight distinct layers sit between a raw InP crystal boule and a hyperscaler's GPU, and — critically — value does not pool where the dollars do. The end buyers (hyperscalers and telcos) spend the money; the module assemblers (mostly Chinese) capture the volume; but the margin concentrates in two narrow chokepoints near the bottom of the stack: the coherent/pluggable DSP and the InP laser chip. This is the central fact of the sector. Component suppliers as a class capture roughly 1/12th of total photonics-enabled system market value, and consistently rank at the bottom of the communications supply chain for profit margins because they are small relative to their customers and have little pricing power. The exceptions are the firms that own a genuine chokepoint.
The eight-layer stack
The cleanest map (from the optical components primer) runs top to bottom:
Layer 5: Cloud / AI Applications (OpenAI, Google, Meta, Microsoft)
Layer 4: Hyperscale Data Center Operators (buy switches + transceivers)
Layer 3: Network Equipment Makers — switches, routers, optical transport
(Cisco, Ciena, Nokia/Infinera, Juniper/HPE, Huawei)
Layer 2: Transceiver Module Makers — assemble components into pluggable modules
(InnoLight, Coherent, Broadcom, Eoptolink, Accelink, Cisco)
Layer 1: Optical Component Makers — lasers, detectors, modulators, filters, MUX/DEMUX
(Lumentum, Coherent, Santec, II-VI legacy, Hamamatsu)
Layer 0: Materials & Foundries — InP wafers, SiPh foundries, specialty glass
(TSMC, GlobalFoundries, Tower Semi, Sumitomo Electric)
Test & measurement (tunable lasers, OSAs, power meters, OCMs) sits alongside the whole stack rather than inside it — component makers use it to characterize filters and gratings, transceiver makers use it for production-line validation of every module, and operators use it for fiber qualification and troubleshooting. See 6777 (Santec), 6754 (Anritsu) for the T&M plays.
The telecom-equipment primer adds a parallel, more margin-explicit version of the same chain: Semiconductor/DSP → Optical Components → Subsystems/Engines → Network Equipment OEMs → Buyers (telcos, cloud, enterprise). Its margin map is the single best per-stage economics picture in the sources and is reproduced in full below.
Per-stage economics — where value is captured
From the telecom-equipment primer (optical chain, but the structure generalizes):
| Stage | Gross margin / character | Why |
|---|---|---|
| Semiconductor / DSP | 50–70% GM, highest-value node | A coherent DSP is a multi-hundred-million-dollar development program; only a handful of firms can design one. TSMC fabricates most. High barriers. |
| Optical components (lasers, modulators, detectors) | Moderate margins | Precision manufacturing, but increasingly commoditized for standard products. Relentless consolidation (II-VI + Coherent). |
| Subsystem / engine | High for proprietary engines (Ciena WaveLogic, Nokia PSE); low for merchant pluggable modules competing on price | IP ownership is the divider |
| Equipment OEM | 35–45% (optical), 40–50% (RAN), but R&D intensity 15–25% of revenue | Scale matters enormously |
| Buyer (operators / hyperscalers) | Spending lives here, but telco EBITDA only 30–40% | Operators are the bottleneck on industry growth; hyperscalers are the new, less-price-sensitive big buyers |
The general-purpose lesson, stated bluntly across multiple sources: the chain inverts the usual intuition. The biggest spenders (operators) have the worst margins and gate the industry's growth; the thinnest, most specialized layers (DSP, InP laser chip) extract the most economic rent. "Picking up pennies in front of a steamroller" is the standing characterization of the component layer as an investment.
The two real chokepoints: DSP and InP laser
Chokepoint 1 — the coherent / pluggable DSP. A near-duopoly of Broadcom and Marvell on the merchant side. InnoLight sources its DSPs primarily from Marvell; Coherent uses both. Marvell's Orion and Nova DSPs power the 400ZR/ZR+ and 800G pluggable ecosystem sold through Coherent, Lumentum, II-VI, et al. On the vertically integrated side, Ciena (WaveLogic), Nokia (PSE + Infinera's ICE), and Cisco (Acacia) each design their own DSP as their core IP moat. The DSP is one of the most complex chips in the world outside GPUs/CPUs, and CMOS-node advances (7nm → 5nm → 3nm) translate directly into higher baud rates. This is the highest-value node in the optical chain — and it is precisely the node under structural attack from LPO/LRO (covered on the technology page), which threatens to move signal conditioning into the switch ASIC's SerDes and eliminate the DSP entirely.
Chokepoint 2 — the InP laser chip. This is the single biggest physical bottleneck in the sector, and the materials note makes the case unambiguously: indium phosphide is the irreplaceable semiconductor behind every optical transceiver, because its direct bandgap emits light at telecom wavelengths and silicon physically cannot (silicon's luminescence quantum efficiency is ~10⁻⁶ — physics, not an engineering gap). Every silicon-photonics transceiver still imports its photons from an external InP laser. Within InP, Lumentum holds ~50–60% global EML market share and is currently the only supplier shipping 200G/lane EMLs at volume — the chip that enables 1.6T transceivers. NVIDIA has pre-allocated EML capacity through 2027; demand exceeds supply by 25–30% even after Lumentum expanded EML capacity +40% twice through 2025. The five EML majors are Lumentum, Mitsubishi, Broadcom, Coherent, and Sumitomo (SEDI). Company-specific depth lives on LITE and COHR.
The "100G EMLs emerged as the main constraint by late 2024" line from LightCounting is the supply-chain tell: the bottleneck is not fiber, not switches, not even DSP — it is laser-chip wafer output.
The materials floor (Layer 0): InP substrate is the chokepoint beneath the chokepoint
Neither Coherent nor Lumentum grows its own bulk InP crystal — both buy bare substrates from a concentrated, geopolitically fraught merchant market. This is the deepest tier of the value chain and arguably the most fragile.
| Substrate supplier | Est. share | Note |
|---|---|---|
| AXT / Beijing Tongmei (China) | 60–70% | VGF growth; InP revenue +250% sequentially Q3 2025; raised $100M Dec 2025 for capacity. Hit by China's Feb 4 2025 indium export controls — per-customer permits, ~60 business days each |
| Sumitomo Electric (Japan) | ~30% (Mordor) to ~60% (36kr/Yole reprint) | Permit-free (Japan, outside MOFCOM regime); +40% 6-inch capacity by 2026. Large captive consumption via SEDI — see 5802, axti |
| JX Advanced Metals (Japan), Freiberger (Germany), InPACT (France, ~20% EU/US), IQE (UK) | remainder |
Total InP substrate market: ~$198–210M (2025) → $385–600M by 2031, driven almost entirely by AI transceiver demand. InP substrates run 10–100× more expensive per unit area than silicon: a production 4-inch InP wafer is $300–800 in volume vs $25–50 for a 6-inch silicon wafer.
The Sumitomo captive-vs-merchant question is load-bearing for the AXT bear case. A Chinese trade source (reprinted by PhotonCap) gives the cleanest captive proxy: "Mitsubishi's current capacity is around 40 million units, expanding to about 50 million next year. Sumitomo's overall capacity is about 80 million units, with EMLs comprising 20%-30% and the remainder being CW products." Best-estimate (low confidence absent Yole's paywalled market monitor): 30–60% of Sumitomo's InP wafer output is consumed internally. The revealed-preference test that the merchant pool is smaller than headline share implies: Coherent and Lumentum are each spending hundreds of millions on captive InP fabs rather than leaning on Sumitomo, and no transceiver maker publicly names Sumitomo as a primary substrate source. Customer-competitor friction (the substrate supplier also sells finished EMLs that compete with its customers) is observable, not theoretical.
The 6-inch InP transition reshapes the cost floor
Wafer size is the single largest cost disadvantage of InP-based photonics. A 300mm silicon wafer has ~16× the usable area of a 76mm InP wafer; 4-inch InP held 43.72% (variously 44.1%) market share in 2025, with 3-inch legacy still running. Coherent's first-mover 6-inch (150mm) InP fabs (Sherman TX + Järfälla Sweden, the world's first, announced March 2024) deliver a claimed 4× more devices per wafer and >60% die-cost reduction vs 3-inch — yields reportedly already exceed mature 3-inch lines. This is the durable cost-advantage wedge between COHR (6-inch, dual-site, vertically integrated, $33M CHIPS funding) and LITE (still primarily 3-inch Caswell / 4-inch San Jose, 6-inch on roadmap). Nokia/Infinera began a 6-inch pilot in April 2025 ($93M CHIPS funding) using AIXTRON G10-AsP reactors — see AIXA. Mechanical brittleness likely caps InP at 150mm; further scaling comes from heterogeneous integration (InP-on-Si via Soitec InPOSI, micro-transfer printing, OKI tiling) rather than bigger boules.
Layer 0 foundries: the silicon-photonics fab war
For the silicon-photonics route, the foundry is the value-capture node — "the foundry capturing this growth earns the highest margins in the value chain." The contenders:
- TSMC (COUPE) — sole foundry for both NVIDIA and Broadcom CPO, no credible alternative at scale, 1–2 years ahead of Intel. PIC on N65, EIC on N6/N7, SoIC-X bumpless hybrid bonding at sub-10μm pitch. Filed 50 US SiPho patents in 2024 (double Intel's 26). See tsmc-coupe-silicon-photonics, TSM.
- Tower Semiconductor — the consensus analyst pick as picks-and-shovels winner; >50% market share in SiGe BiCMOS TIAs and drivers for datacom transceivers, serves 50+ SiPho customers including 7 of the top 11 datacom transceiver makers, ring add/drop filters supplying NVIDIA's 1.6T. 300mm SiPho process (Nov 2024). Open foundry (multi-project wafer). See TSEM.
- GlobalFoundries (Fotonix) — 45nm CMOS, 300mm monolithic, design-win announcements from Broadcom/Cisco/Marvell/NVIDIA/Ayar/Lightmatter but disputed production volume; friend-shoring angle, CHIPS support, $3B SiPho R&D + $575M packaging.
- Intel — 61% datacom SiPho shipment share, 8M+ PICs shipped, but divested pluggable modules to Jabil to focus on higher-value components; remains at "R&D and demonstration stage" on CPO.
Silicon-PIC market: $95M (2023) → $863M+ (2029) at 45% CAGR (Yole). SiPho transceiver share projected to reach 44% by 2028 (from ~24% in 2022 / ~22% today).
Layer 2: the module-assembly layer is where volume lives and margin doesn't
Module assembly is the highest-volume product in the chain and the most commoditized. China dominates it: InnoLight (Zhongji) and Eoptolink captured ~60% of NVIDIA's 800G volume; InnoLight holds >50% wallet share of NVIDIA's optical-module procurement and shipped 3 million SiPho modules in 2024 alone. The strategic-security read (Nomura) is that this concentration is a supply-security risk for AI networking — hence the friend-shoring interest in the Japanese chain (6855 JEM, 6834 Seikoh Giken, 5802 Sumitomo, 6777 Santec).
The outsourced-assembly chokepoint outside China is Fabrinet (~50% of outsourced optical communications manufacturing) — "100% Blackwell-platform market share for 1.6T transceivers" per Susquehanna, sole-source NVIDIA (28% of FY2025 revenue), Cisco 18%, plus an Amazon warrant deal. Lumentum and Coherent both rely on Fabrinet (Thailand) for high-volume module assembly — though Coherent is the exception that brings assembly in-house (Malaysia, Vietnam), eliminating that dependency. The full transceiver supply-chain split: USA designs the chips (Marvell/Broadcom/Credo DSP + driver ICs), China manufactures the modules, Taiwan assembles/tests (TSMC fab, ASE backend), Europe does research (IMEC, Trumpf). Notably, this chain is less vertically integrated than mainstream logic semis — a modular stack with balanced regional participation.
The transceiver BOM and per-unit economics
The transceiver is the value-chain's keystone product; its bill of materials shows exactly which suppliers get paid. Per the analyst views and networking notes:
- DSP = $50–70 of BOM, and ~50% of pluggable module power (4W in 400G, 12–13W in 800G). Represents 20–40% of transceiver module cost. This is the LPO elimination target.
- Laser sources (EML/DFB/CW) = the supply-constrained piece; laser content per transceiver is falling as VCSEL/SiPho ramp, per SemiAnalysis ("100G per lane EMLs are quite commoditized... laser content per optical transceiver will continue to fall").
- NVIDIA's ring-modulator architecture requires ~½ to ¼ the InP content of competing MZI-EML solutions — a structural BOM advantage that lets NVIDIA "charge 50–70% gross margins on these ring-based (and internal-DSP) 1.6T transceivers and still undercut Coherent and others on pricing."
Headline per-unit economics from SemiAnalysis on the GB200 generation: 1.6T transceivers cost ~$850 each at ~30W; per-rack transceiver cost of $550,800 translates to $2.2M to customers at NVIDIA's 75% margin target. The scale-out ratio holds at 1 OSFP port per GPU (the "Optical Boogeyman" point — copper NVLink inside the rack does not reduce scale-out optical demand). NVIDIA's CPO route delivers 9W per 1.6T port vs 30W pluggable and claims 4× fewer lasers.
The packaging / alignment bottleneck — the structural cost penalty
The most important per-stage cost fact in the whole chain, repeated across multiple sources: packaging and alignment consume up to 80% of optical-module cost, versus <50% for traditional electronics. Specifically:
- ~80% of photonic-IC cost is consumed in alignment processes — sub-micron precision within tens of nanometers, far tighter than electronic tolerances, still largely manual/custom and resistant to economies of scale.
- Silicon-photonics testing can consume 60–90% of product cost (vs ~10% for standard semiconductors) due to optical-alignment complexity; customers routinely build their own in-house test environments for lack of standardized solutions.
- Coupling an external InP laser into a silicon waveguide is "alignment satanic suffering" — ~2.5 dB coupling loss and significant packaging cost.
This alignment/packaging cost wall — not the photonic chip itself — is the true manufacturing bottleneck for CPO and the reason optical never scales like CMOS. It is also the reason advanced-packaging foundries (TSMC SoIC-X/CoWoS, Tower 3D-IC) sit at a value-capture node.
Customer relationships, switching costs, and pricing power
Three structural features lock the chain:
- Qualification cycles of 12–24 months (Telcordia GR-468 reliability, environmental stress, field trials); multi-year for CPO; FDA on top for medical/OCT. Once qualified, re-qualifying a new supplier is expensive and risky — strong incumbency advantage and high switching cost.
- Customer concentration: companies routinely derive 20–60% of revenue from a single customer (Applied Optoelectronics ↔ Amazon is the cautionary tale; Fabrinet 28% NVIDIA). The whole downstream is gated by a handful of hyperscalers (MSFT, GOOG, META, AMZN, ByteDance) plus, increasingly, NVIDIA as architecture-setter.
- Pricing power sits only at the chokepoints. Lumentum's claimed yield edge buys "some pricing latitude" on EMLs (management-stated, unverified by third parties). NVIDIA's ring/internal-DSP architecture is the clearest pricing-power story — lower BOM content plus lock-out of Marvell's DSP. Everyone selling complete commodity transceiver solutions faces margin compression from both NVIDIA's architectural advantage and Chinese cost competition ("getting annihilated by the Chinese"; China's InP vertical integration has cut coherent module pricing ~25% vs 2023).
Network-equipment layer (Layer 3) and the pluggable-vs-transponder shift
At the systems layer, the optical-transport vendors are Huawei (#1 globally ~33%), Ciena (#1 Western / North America ~50% US share, #2 global ~19%, in-house WaveLogic DSP), Nokia+Infinera (#2 global ~20% post-Feb 2025 acquisition, PSE+ICE DSPs), Cisco/Acacia, ZTE, Adtran (merchant Marvell DSP). The structural shift reshaping this layer is pluggable coherent (400ZR/ZR+, 800ZR) displacing dedicated transponder shelves — collapsing two devices into one, shifting billions in spend from traditional optical-equipment OEMs toward pluggable-transceiver and merchant-DSP companies. In long-haul/inter-DC, Ciena transponders held ~70% share, now under attack from ZR+ pluggables at <40 km — an open question (networking notes) is whether Ciena benefits from or gets cannibalized by the multi-DC training trend.
Bottleneck-tier summary
Ranked by 2025–2027 supply tightness and value capture, the chokepoints are, in order:
- InP laser chip / EML — Lumentum 50–60%, only 200G/lane volume supplier, demand > supply by 25–30%, NVIDIA pre-allocated through 2027. The hardest physical constraint.
- InP substrate — AXT/Tongmei 60–70% but permit-gated by China export controls; Sumitomo permit-free but heavily captive. A ~$200M market gating a multi-tens-of-billions transceiver market.
- Coherent / pluggable DSP — Broadcom/Marvell duopoly, highest GM node, but structurally threatened by LPO/LRO and NVIDIA's internal DSP.
- SiPho foundry + advanced packaging — TSMC COUPE as sole CPO foundry for NVIDIA + Broadcom; alignment/packaging at 80% of module cost is the scaling wall.
- Outsourced module assembly — Fabrinet ~50% ex-China / "100% Blackwell 1.6T"; otherwise commoditized and China-dominated (InnoLight + Eoptolink ~60% of NVIDIA 800G).
Players
The optical networking value chain has a clear shape, and where a company sits on it determines how much value it captures and how exposed it is to the next architectural shift. The stack runs from substrate/foundry at the bottom (InP wafers, SiPho foundries), through component makers (lasers, modulators, detectors, DSPs), to module/transceiver assemblers, to network equipment OEMs, and finally to the hyperscalers and telcos who buy it all. The recurring lesson across the source research: the highest-margin, most defensible nodes are the DSP/coherent-engine layer and the substrate/foundry layer; the module-assembly layer is the most commoditized and most exposed to Chinese cost competition. Keep company-specific deep detail on the ticker pages — this section gives the positioning and the comparative view.
A standing caveat runs through all of this. The optics sector has a brutal investment track record — JDS Uniphase posted the largest corporate loss in US history ($50.6B; stock down 99.4% from $355 to under $2, 1999-2002), and Nortel (38% of the entire Toronto Stock Exchange at its 2000 peak, ~$400B market cap) went bankrupt in 2009. Component suppliers capture only ~1/12th of total system value, ~80% of photonic IC cost is consumed in alignment, and silicon photonics testing can run 60-90% of product cost versus ~10% for semiconductors. Even winners get punished: Coherent crashed 20% after beating Q2 2025 earnings because guidance missed by 0.6%. Position accordingly — this is a "picking up pennies in front of a steamroller" sector where systematic disappointment is the base case.
The comparison files
The head-to-head analyses worth referencing by name:
- santec-vs-jem-vs-anritsu-and-more-versus — the Japanese optics-chain peer comparison (Santec vs. JEM vs. Anritsu and others), grounding relative competitive position among the small-cap Japan plays.
- soitec-vs-aixa-showdown — Soitec (photonics-SOI wafers) vs. Aixtron (MOCVD epitaxy equipment), the substrate/equipment showdown.
- analyst-views-optical-transceiver — not a single comp table but the cleanest synthesis of sell-side vs. independent-analyst divergence on transceiver winners (Irrational Analysis long LITE/TSEM/FN, short COHR/MRVL; SemiAnalysis's "AI head-fakes" framing).
Substrate and materials (Layer 0)
5802 Sumitomo Electric — Japan's specialty fiber and InP substrate house. Ultra-low-loss fiber, multi-core fiber, and an estimated ~30% (some Chinese trade sources cite up to 60%, gap explained by captive output) of merchant InP substrate. Critically, Sumitomo is vertically conflicted: its SEDI arm is one of the five EML majors (alongside Lumentum, Mitsubishi, Broadcom, Coherent) and competes head-to-head in coherent transceivers and tunables, so downstream laser makers avoid depending on it for substrate. Japan-based fab sits outside MOFCOM's Feb 2025 indium export-licensing regime — a friend-shoring advantage. Total InP substrate market ~$198-210M (2025) → $385-600M by 2031. The merchant-vs-captive split is the load-bearing question for the AXT bear case (axti).
AXT Inc. / Beijing Tongmei — controls ~60-70% of global InP substrate from China (VGF growth); InP revenue +250% sequentially in Q3 2025, raised $100M in Dec 2025 for InP expansion. The geopolitical chokepoint: China's Feb 4 2025 indium export controls force ~60-business-day individual permits per customer. AXT's qualified, non-vertically-conflicted merchant position retains strategic value despite permit risk. Other substrate suppliers: JX Advanced Metals (Japan), Freiberger (Germany), InPACT (France, ~20% Euro/US share), IQE (UK).
SOITEC Soitec — photonics-SOI wafers for transceivers; developing InPOSI (InP-on-Silicon) via Smart Cut to put InP thin films on 200-300mm silicon handle wafers. See soitec-vs-aixa-showdown.
AIXA Aixtron — MOCVD epitaxy equipment for optoelectronic laser growth; the G10-AsP Planetary Reactor is purpose-built for 150mm InP MOCVD (33 ppm center-to-edge lattice mismatch). Picks-and-shovels exposure to the 6-inch InP transition and GaN laser epitaxy. Also a Kerrisdale activist long (kerrisdale-aixtron-long-thesis).
Silicon photonics foundries (Layer 0)
The foundry war is the single most consequential structural call. Both SemiAnalysis and Irrational Analysis position Tower over GlobalFoundries.
TSEM Tower Semiconductor — the consensus picks-and-shovels SiPho winner. PH18 200mm platform in volume; 300mm SiPho released Nov 2024 with "best-in-class silicon waveguides"; >50% market share in TIAs/drivers for datacom transceivers; serves 50+ SiPho customers including 7 of the top 11 datacom transceiver makers. 2024 SiPho revenue ~$105M (tripled from 2023), expected to more than double in 2025; Q4 2024 total revenue $387M. Irrational Analysis: "going to the moon" and "Tower Semi and GloFo are the only two quality photonics-capable Fabs." Supplies ring add/drop filters into Nvidia's 1.6T transceivers via InnoLight, and is "the primary foundry for ACC used extensively in Nvidia Blackwell racks." Intel partnership provides 300mm capacity (New Mexico). Note one tension in the sources: one note claims Nvidia "ported its ring modulator design from TSMC to Tower," while silicon-photonics-ai-datacenters corrects this — Nvidia's CPO uses TSMC COUPE exclusively; Tower serves the pluggable segment (InnoLight, Coherent). See TSEM-optical-backbone, TSEM-si-photonics.
TSMC — 67.6% foundry share, ~100% of AI datacenter logic. COUPE (Compact Universal Photonic Engine) is the production 3D SiPho platform: SoIC-X bumpless hybrid bonding fusing EIC (N6/N7) onto PIC (N65), sub-10μm pitch. Sole foundry for both Nvidia and Broadcom CPO — no credible alternative at scale. Three-gen roadmap: Gen 1 pluggable 1.6T (mass production 2H26), Gen 2 CoWoS-integrated 6.4T (late 2027-early 2028), Gen 3 on-package 12.8T (pathfinding). Filed 50 US SiPho patents in 2024, double Intel's 26; runs 1-2 years ahead of Intel. See tsmc-coupe-silicon-photonics, siph-primer-jpm-semi-silicon-photonics-primer-a-11b-marke.
GlobalFoundries — the Western/friend-shoring SiPho foundry bet (GF Fotonix, 45nm CMOS, 300mm monolithic giving ~9x the die area of III-V wafers). Claimed design wins from Broadcom, Cisco, Marvell, Nvidia, Ayar Labs, Lightmatter; $3B additional SiPho R&D + $575M packaging center; CHIPS Act support. But the sources flag a sharp disconnect — Irrational Analysis dismisses it: "Glofo has competing SiPho nodes and investors should go ask them why they are not getting meaningful orders." Design wins have not translated to visible production volume. See sa-globalfoundries-sipho-foundry.
Intel — leads datacom SiPho with ~61% market share, >8 million PICs shipped with 32M+ integrated lasers, but divested pluggable modules to Jabil and sits at "R&D and demonstration stage" on CPO as of late 2024. Strong manufacturing maturity, weak competitive momentum in the AI-cycle narrative.
Laser chips and components (Layer 1) — the InP duopoly
The central battle is Coherent vs. Lumentum, framed in inp-sige-photonic-materials as vertical integration vs. laser-chip dominance.
Lumentum (LITE) — ~50-60% global EML market share, the chokepoint supplier for the industry's most constrained component, and currently the only supplier shipping 200G/lane EMLs at volume (the chip enabling 1.6T transceivers). Demand exceeds supply by 25-30% despite +40% EML capacity twice through 2025 (migrating 3in→4in InP wafers). Sole-source Nvidia CPO laser; leads in ultra-high-power CW lasers (70mW ramping to 100mW). Irrational Analysis is "hyper-omega bullish" — largest position in their account — citing "highest quality EML in the world." Also the dominant OCS player (see below) and ROADM/WSS leader (TrueFlex). Q1 FY2026 revenue $533.8M (+58% YoY); stock ran from ~$60 (early 2025) to $435 (Feb 2026). Strategic vulnerability: still on 3-inch (Caswell UK) and 4-inch (San Jose) InP while Coherent runs 6-inch; relies on Fabrinet for assembly. See lumentum-series-part1-transceivers.
Coherent (COHR) — the most vertically integrated InP supply chain in the industry; world's first 6-inch (150mm) InP fab (Sherman TX + Järfälla Sweden, dual-site redundancy), giving ~4x more devices per wafer and >60% die-cost reduction. Took #1 in 800G module shipments in 2024. FY2025 revenue $5.81B, networking $3.42B (+49% YoY). The sharpest analyst split in the whole sector: Wall Street rates it Buy (PT $91-125, "CPO concerns overblown"), while Irrational Analysis is short and brutal — "probably the biggest AI head-fake," "vertically-integrated debt-laden monster," "an inferior version of Lumentum" that "buys a lot of EML from Lumentum" and is "getting annihilated by the Chinese" on cost. SemiAnalysis (2023) also labeled it the biggest head-fake. The bull/bear gap rests on whether 6-inch first-mover cost advantage beats Lumentum's chip-quality lead and Chinese cost pressure.
Broadcom — DSP/SerDes powerhouse and the other half of the merchant-DSP duopoly with Marvell; 15-20% transceiver share. Tomahawk 5 SerDes is "best SerDes in the game today" (enabled the LRO transition). CPO generational history: Humboldt (TH4, Tencent), Bailly (TH5, 51.2T, Meta), Davisson (TH6, 102.4T, Oct 2025, on TSMC COUPE). World leader in VCSEL — and the fact that Broadcom stopped at 100G/lane is the key evidence cited that 200G VCSEL is not yet reliable. See broadcom-william-blair-initiation.
Marvell — the merchant coherent DSP leader (Orion/Nova power the 400ZR/ZR+ and 800G pluggable ecosystem; $10B Inphi acquisition built the electro-optics stack); 3nm DSP at 1.6T, 5-15 pJ/bit. The most contested name: silicon-photonics bulls (one source) rate it Tier-1 Strong Buy on custom AI silicon + 3D SiPho; Irrational Analysis is short it because LPO/LRO and Nvidia's internal DSP threaten its pluggable-DSP dominance — and Nvidia's ring modulators require a different voltage swing than MZI, creating Nvidia lock-out. DSP is 50% of pluggable-module power and the obvious elimination target as modules hit 30W thermal limits.
6777 Santec — Japanese T&M specialist (LCOS spatial light modulators, WSS submodules, tunable lasers for test, swept-source OCT). World-first commercial ECTL (1989) and first high-speed SS-OCT laser (2005). TTM revenue ~$166M; Forbes Asia 2025 Top 200. Sits alongside the transceiver stack (its tunable lasers are for T&M, not inside production modules), so it's a different kind of exposure — picks-and-shovels to the whole chain plus an emerging semiconductor-metrology-via-OCT angle. CPO risk: if the supply chain consolidates around foundries, demand could shift to integrated photonic test. See optical-components-primer (reference company), 6777-filings.
6754 Anritsu — RF/microwave and optical/telecom T&M; direct competitor to Santec in test. See 6754-anritsu-deep-dive, 6754-anritsu-mgmt-dd.
6855 JEM — precision optical connectors. See 6855-jem-deep-dive, 6855-profile, 6855-mgmt-dd.
6834 Seikoh Giken — APC fiber connectors (an industry standard). See 6834-buy-checklist.
Other component names flagged in the source notes: Semtech and MaxLinear (analog/DSP front-end), Hamamatsu (photonic sensors/detectors), Analog Devices (burst-mode CDR for PON; ADN2855 exemplar), NKT Photonics (tunable lasers), Excelitas/Axsun, Thorlabs, Topcon, Exalos (SS-OCT lasers, top players hold >60% of that market). Fujikura, Yokogawa, Hamamatsu round out the Japanese precision-optics cluster (Japan ~30% of global photonics manufacturing). Watch-list names: Astera Labs (retimers/signal integrity), Aeluma (PICs).
Module / transceiver assembly (Layer 2)
This is the highest-volume, most-commoditized layer — and where China dominates.
Fabrinet (FN) — the consensus low-risk AI-optics play; ~50% share of outsourced optical-comms manufacturing and the most direct beneficiary of the buildout. "100% Blackwell platform market share for 1.6T transceivers" (Susquehanna), sole-source Nvidia. Nvidia is 28% of FY2025 revenue, Cisco 18%, plus an Amazon warrant deal. FY2025 record revenue $3.4B (+19% YoY), Q4 $910M; DCI segment $107M (+45% YoY); 800G+ products $313M. Building 10 adds 2M sq ft. Irrational Analysis long, "going to the moon"; Wall Street Overweight (PT $345-550). Also the assembly partner Lumentum depends on (a dependency Coherent avoids via in-house Malaysia/Vietnam).
InnoLight / Zhongji Innolight — China's dominant datacom transceiver maker, ~18% global share and >50% wallet share of Nvidia's 800G module procurement; shipped 3M SiPho transceiver modules in 2024. Sources primarily from Marvell DSP. SemiAnalysis is cautiously bullish but warns of "supply chain intoxication." No dedicated vault coverage yet (flagged as a gap).
Eoptolink — rising Chinese datacom-transceiver competitor; with InnoLight captured ~60% of Nvidia's 800G volume. Nvidia expanded 1.6T suppliers from Fabrinet/Innolight to include Eoptolink. No vault coverage (gap).
Accelink — Chinese components/transceivers, top-5 globally by revenue. HG Genuine also moving up from assembly to component design. The structural question across all of these: is the module layer permanently commoditized, or can Western/Japanese suppliers recapture share?
Network equipment OEMs (Layer 3) — coherent transport and switching
Ciena — #1 Western DCI/long-haul, ~50% US optical-transport share / ~19% global; vertically integrated WaveLogic DSP (WL6e is the 1.6T flagship, demonstrated 1.6T over 700km commercially). Primary beneficiary of the AI-DCI boom; stock roughly doubled off 2024 lows. Holds ~70% of inter-DC transponder share — but faces the open question of whether pluggables (ZR+) cannibalize its long-haul transponder business as multi-DC training scales.
NOK Nokia — #2 Western optical after acquiring Infinera (~$2.3B, closed Q1 2025), combining Nokia's PSE coherent engine with Infinera's ICE engines and unique InP PIC heritage; ~$4-5B combined optical revenue. Also a RAN Big-3 vendor (~18-20% RAN share) and the anchor partner with NVIDIA + T-Mobile on AI-RAN (anyRAN, MantaRay, AVA). The integration of Infinera is the key execution risk/upside. Long-haul single-wavelength 800G via fancy DSPs is a Nokia-class capability.
Cisco / Acacia — vertically integrated coherent via the $4.5B Acacia acquisition (2021); ~50% telecom-coherent share; CIM 8 is the latest platform. Also acquired Luxtera ($660M). 18% of Fabrinet revenue. Sells its own 400G/800G ZR/ZR+ pluggables.
Huawei — #1 global optical transport (~33% share 2024) and #1 RAN by revenue (~28-30%), dominant in China and developing markets, banned in most Western markets. The market is bifurcating into "China" (Huawei/ZTE) and "rest of world" ecosystems.
Ericsson (~25-28% RAN, strongest in US), Samsung (~10-12% RAN, won Verizon), ZTE (#2 China), Adtran, Juniper/HPE (acquired by HPE July 2024, $14B) round out the OEM layer. The full optical+RAN equipment market is $60-70B+/yr; see telecom-network-equip for the RAN side.
Optical circuit switch (OCS) — the emerging sub-segment
A distinct switching layer where 5802-adjacent MEMS expertise matters and Lumentum leads externally. Lumentum R300 (300×300) and R64 (64×64) are the most commercially advanced MEMS-based OCS, >$400M backlog (Feb 2026), three hyperscale customers, guiding to $100M/quarter by Dec 2026 (~half the projected market). The OCS market reaches ~$2.5B by 2029 (Cignal AI). Google is the pioneer (Project Apollo / Palomar 136×136, tens of thousands deployed, >$3B cumulative; 5x capacity, 30% capex / 41% power reductions). Competitors: Calient (S320, 3D MEMS, Chinese-owned since 2020 — geopolitical disadvantage for US hyperscalers), Polatis/Huber+Suhner (piezoelectric, 384×384, 5x capacity expansion), Coherent DLX (digital liquid crystal, 300×300), Telescent (robotic fiber). Meta (TopoOpt, 3.4x faster training) and Microsoft are in evaluation.
The CPO/OIO challengers (Layer 1.5)
Startups attacking the interconnect with co-packaged / in-package optics, mostly fabless on the foundries above:
- Ayar Labs — optical I/O (OIO), TeraPHY engine; demoed first TSMC COUPE-based in-package optical I/O with Alchip at OIP 2025; $372M funding, >$1B valuation; 5 pJ/bit, >100 Tbps scale-up. Nvidia/Cisco are LPs in related plays. Skeptical take: optical-illusions-ayar-labs-analysis argues CPO economics don't flip vs. pluggable until 3.2T. See sa-ayar-labs-cpo-nvidia.
- Lightmatter — $850M raised, $4.4B valuation; Irrational Analysis is skeptical it has working silicon ("no evidence thing has ever turned on and worked").
- Celestial AI — different optical-integration approach vs. Ayar.
- Xscape Photonics — Nvidia/Cisco-funded; partnered with Tower (Aug 2025) on multi-wavelength laser platforms for GPU-to-GPU links.
- Nvidia itself — the structural disruptor. Its micro-ring-modulator CPO on TSMC COUPE needs ~½ to ¼ the InP content of MZI/EML rivals, delivers 9W vs. 30W per 1.6T port (3.5x power efficiency), 4x fewer lasers. Irrational Analysis: Nvidia "can charge 50-70% gross margins on these ring-based 1.6T transceivers and still undercut Coherent." This is the thesis that "wipes everyone else out" on the transceiver-solution side while sparing the picks-and-shovels suppliers (Fabrinet, Tower, Lumentum) that feed Nvidia without competing with it.
The bull/bear scorecard (independent vs. sell-side)
| Company | Irrational Analysis | Wall Street consensus | SemiAnalysis (2023) |
|---|---|---|---|
| Lumentum (LITE) | Long (largest position) — "highest quality EML" | Strong Buy, PT $82-325 | "AI head-fake" — laser content falling |
| Tower Semi (TSEM) | Long — "going to the moon" | (favorable) ~36% upside | SiPho foundry winner |
| Fabrinet (FN) | Long — "low-risk, medium reward" | Overweight, PT $345-550 | (sole-source Nvidia/AWS) |
| Coherent (COHR) | Short — "might be completely f***ed" | Buy, PT $91-125 — "CPO overblown" | "Biggest AI head-fake" |
| Marvell (MRVL) | Short — DSP at risk from LPO + Nvidia DSP | Tier-1 Strong Buy (a separate source) | (n/a) |
| Zhongji Innolight | (n/a) | (n/a) | Cautious bull — "supply chain intoxication" |
Market-size context for sizing the players
| Metric | 2023 | 2024E | 2029-30E | CAGR |
|---|---|---|---|---|
| Total transceiver market | $10.9B | ~$17B | $22-25B | 15-16% |
| AI cluster optics | ~$2B | $5B | $10B+ | 38% |
| Silicon photonics PICs | $95M | — | $863M+ | 45% |
| SiPh transceiver share | ~22-24% | — | 44-45% (by 2028) | — |
| CPO components / market | ~$15M | — | $20B (2036) / $60B+ (2030, RJ) | 37% |
| OCS | — | — | $2.5B (2029) | — |
| InP substrate | ~$198-210M (2025) | — | $385-600M (2031) | — |
The consensus winners across the analyst sources — Fabrinet, Tower Semi, Lumentum — share one trait: they supply Nvidia's optical ecosystem without competing with it. Companies trying to sell complete transceiver solutions (Coherent, the Chinese module makers) face margin compression from Nvidia's architectural edge and Chinese cost competition. Marvell is the genuine coin-flip — its merchant-DSP moat is exactly what LPO/LRO and Nvidia's internal DSP are built to dissolve.
Coverage gaps in the vault
Flagged across the source notes as not yet covered: no dedicated InnoLight / Eoptolink pages (the biggest module players by volume), no Coherent (COHR) deep dive, no Lumentum full deep dive (only lumentum-series-part1-transceivers Part 1), no 800G→1.6T cost-curve model, and VCSEL technology evolution is not tracked.
Monitor
This is the rolling log for optical networking and photonics — dated developments, catalysts that have fired, and the standing watch-items. It consolidates the dated framing scattered across the primers, analyst notes, and source feeds. The standing thesis the whole sector hangs on: AI training clusters at 100K+ GPUs need 800G optics today and 1.6T by 2026-27, and the single most consequential unresolved debate is whether co-packaged optics displaces pluggable transceivers, and when. Everything below is a marker against that thesis.
Standing watch-items (the recurring checklist)
These are the questions to re-check every quarter. They recur across nearly every source and define what "news" actually moves the sector.
- CPO vs. pluggable timing. When does co-packaged optics ship at scale? Skeptics say 3.2T (2028+); bulls say 1.6T (2026-27). The answer determines whether TSMC COUPE, Tower Semi TSEM, and GlobalFoundries SiPho foundry bets pay off. Every generation, CPO proponents say "this is the last pluggable" — and every generation pluggable wins on flexibility and serviceability. Watch whether that pattern breaks at 1.6T or 3.2T.
- 200G VCSEL reliability. The sharpest technical disagreement in the sector. The burden of proof is on Coherent and Broadcom to show GR-468 qualified production data. Until then, EML and SiPho architectures dominate 1.6T. Broadcom — the world VCSEL leader — stopped at 100G/lane, which the bears read as validation. Yole projects 200G VCSELs not in mass production until 2026 at earliest.
- China module dominance. InnoLight and Eoptolink hold 60%+ of 800G transceiver share. Can Western/Japanese suppliers recapture share, or is the module layer permanently commoditized?
- InP supply / EML shortage. EML production capacity is the persistent bottleneck. Lumentum LITE holds ~50-60% global EML share and is the only volume supplier of 200G/lane EMLs (the chip enabling 1.6T). Demand exceeds supply by 25-30%. NVIDIA has pre-allocated EML capacity through 2027. McKinsey estimates a meaningful InP laser shortfall in 2026. Watch InP substrate availability under China's Feb 2025 indium export controls.
- 6-inch InP transition. Coherent leads with the first 6-inch (150mm) InP fabs (4x more devices per wafer, >60% die-cost reduction); Lumentum lags on 3-inch/4-inch. Whether Lumentum closes this gap is its key vulnerability. Whether Coherent's claimed 6-inch yields (already above mature 3-inch) hold as it scales is the validation to watch.
- LPO/LRO vs. DSP. Linear pluggable/receive optics threaten Marvell's pluggable DSP dominance — DSP is ~50% of module power and $50-70 of BOM. LightCounting projects LPO/CPO at high volume by 2028, scale-up networks accelerating 2026-27. Watch whether LPO actually takes off or stays "interesting alternative."
- Hyperscaler capex sustainability. Combined Meta/Google/Microsoft/Amazon capex exceeded $200B in 2025-2026. The AI supercycle masks underlying cyclicality. Any pullback hits optical hard — this is the sector's biggest single risk.
- OCS adoption beyond Google. Optical circuit switch is a genuine architectural inflection. Google proved it over 8 years; the consequential near-term signal is whether Meta and Microsoft move from research/evaluation into production deployment.
- Japan optics valuations. 6777 Santec, 6855 JEM, 6834 Seikoh Giken are thin-liquidity small-caps. Genuine compounders or niche suppliers that stay niche?
Dated catalyst log
This is the chronological record of what fired and when. Pulled from across the primers and analyst notes.
Aug 2023 — SemiAnalysis "AI head-fakes." Dylan Patel / Daniel Nishball publish "Nvidia's Optical Ascent: >$1B Revenue; The Missing 800G Ramp; AI Head-Fakes." Core warning: "Nowhere have there been more AI head-fakes than the optical transceiver market." Bearish on Lumentum (laser content commoditizing) and brutal on Coherent ("probably the biggest AI head-fake," a "vertically integrated debt-laden monster"). This is the 2023-vintage view — flagged as possibly evolved since.
Mar 2024 — SemiAnalysis "Optical Boogeyman." Dispelled fears that NVL72's copper NVLink would cut optical demand. Demonstrated the ratio remains 1 OSFP port per GPU for scale-out networking — a durable framing.
Mar 2024 — Coherent announces first 6-inch (150mm) InP fab capability at Sherman, Texas and Järfälla, Sweden. World-first; achieved full 6-inch production ~1 year ahead of schedule with initial yields reportedly higher than mature 3-inch lines.
OFC 2024 — Coherent and Broadcom both demonstrate 200G VCSEL. Begins the still-unresolved GR-468 qualification question. Coherent also demonstrated digital-liquid-crystal OCS at 300×300; won the 2024 ECOC Best Product award for it.
Late 2024 — 100G EML emerges as the main supply bottleneck (LightCounting). Precisely because 200G VCSEL scaling stalled. Shortages expected to ease through H1 2025.
Q4 2024 — Component shortages hobble transceiver sales (LightCounting, Feb 2025). 200G EML lead times extending beyond 2027 for some suppliers; Coherent and InnoLight most impacted.
Q4 2024 — TSMC COUPE Gen 1 spec finalized; sampling begins. Also: TrendForce reports Broadcom and NVIDIA will be the first COUPE customers. Lumentum 200G PAM4 EMLs enter production.
Dec 2024 — China antitrust probe opens on the NVIDIA-Mellanox deal.
Jan 2025 — Digitimes: TSMC prioritizes COUPE, eyes silicon photonics lead.
Feb 2025 — China imposes export controls on indium and indium compounds (effective Feb 4). Forces AXT/Tongmei (60-70% of global InP substrate) to obtain individual export permits per customer — ~60 business days each, persistent uncertainty. Sumitomo's Japan fab sits outside this regime.
Feb 2025 — Nokia closes Infinera acquisition (~$2.3B, Q1 2025). Creates the credible Western #2 optical vendor to Huawei, combining Nokia PSE with Infinera ICE engines and InP PIC technology.
Mar 2025 — NVIDIA GTC announces Quantum-X Photonics (InfiniBand) and Spectrum-X Photonics (Ethernet) CPO switches — the world's first 3D-stacked silicon photonics switches, built on TSMC COUPE. Quantum-X: 115.2 Tb/s across 144 ports; Spectrum-X up to 400 Tb/s. Claims 3.5x better power efficiency, 10x higher network resiliency, 63x greater signal integrity, 4x fewer lasers vs. pluggable. Jensen: "really crazy, crazy technology."
Mar 2025 — Tower-InnoLight announcement of a breakthrough that halves laser requirements per module (serves InnoLight pluggable designs, not NVIDIA CPO).
Mar 2025 — OFC 2025. Lumentum demonstrates a 448 Gbps EML (224 GBaud PAM4) with Keysight and NTT. Lumentum unveils the R300 flagship OCS (300×300 ports, single-crystal silicon MEMS, no closed-loop control, ≤3 dB insertion loss). TSMC unveils full silicon photonics strategy and demonstrates SiN integration.
Apr 2025 — US imposes tariffs up to 104% on Chinese optical fiber products, with additional 25-55% on various optical imports from Asia. (China separately runs 33.3-78.2% anti-dumping duties on US fiber optic products; combined rates reach 125-145% on some imports.)
Apr 2025 — Nokia/Infinera begins 6-inch InP pilot line using AIXTRON G10-AsP reactors, backed by $93M CHIPS Act funding.
Jun 2025 (FQ4 FY25) — Lumentum recognizes first OCS revenue. Polatis/Huber+Suhner opens a new Poland OCS factory, planning to 5x capacity over two years.
Summer 2024 / mid-2025 — Lumentum Thailand brings 1.6T transceiver lines online; workforce grown 3,000 → 6,000 in nine months (projected 11,000); 2.3 billion baht (~$67M) additional investment; expected output value $4B by 2028-29.
Aug 2025 — Tower partners with Xscape Photonics (NVIDIA/Cisco-funded startup) on multi-wavelength laser platforms for GPU-to-GPU links.
Aug 2025 — US export-restriction snapshot: DSPs restricted; SerDes and analog ICs not; some upstream materials (GaAs) restricted.
Sep 2025 — ECOC: Lumentum announces R64 OCS (64×64, scalable to 72×72, 2RU, <150W, 100+ Tbps). Sampling Q4 2025, GA H2 2026.
Sep 2025 — SEMICON Taiwan: TSMC publicly "lifts the curtain" on COUPE. TSMC OIP Europe: Ayar Labs + Alchip demo the first COUPE-based optical I/O engine.
Oct 8, 2025 — Broadcom ships Tomahawk 6 "Davisson" to early-access customers — industry's first 102.4 Tbps Ethernet switch with CPO, 16× 6.4 Tbps COUPE optical engines, 800G port power 3.5W, 36.4% power reduction vs. Tomahawk 5 CPO. Third-generation Broadcom switch CPO (after Humboldt/TH4 and Bailly/TH5). The Next Platform framing: "the third time will be the charm."
Nov 2024 — Tower releases 300mm SiPho process ("best-in-class silicon waveguides"). Nov 2025 — Tower CPO foundry tech announcement integrating SiGe BiCMOS with SiPho 3D-IC.
Nov 2025 — Sumitomo Electric "Growth Strategy for Data Center" deck names EML and CW lasers on InP/GaAs as the main products for intra-DC and long-haul/submarine; frames the +40% 6-inch InP capacity expansion (targeted 2026) as captive datacenter ramp, not merchant supply.
Dec 2025 — Lumentum total revenue hits record $665.5M (December quarter); OCS backlog surges past $400M (majority shipping H2 CY2026); guidance $780-830M for March 2026 quarter (85%+ YoY). Stock ~$60 early 2025 → $435 by Feb 2026. AXT raises $100M for InP capacity expansion (InP revenue +250% sequential in Q3 2025).
Dec 2025 — IDTechEx: CPO market to grow at 37% CAGR to $20B by 2036.
Feb 2026 — Lumentum OCS backlog confirmed >$400M; three hyperscale customers (two shipping by mid-2025, third committed for CY2026); guidance to $100M/quarter OCS revenue by December 2026 (~half the total OCS market per Cignal AI).
Mar 2026 — OFC 2026 (Mar 15-19, Los Angeles, ~18,000 attendees). AI infrastructure dominated. Framing: 800G moved from pilot to mainstream in 2025; 1.6T entering production ramps in H2 2025; path to 3.2T modules; architecture progression pluggable → LPO → CPO → on-package optical I/O drew heavy attention. AIM Photonics demonstrated US-based PIC/CPO manufacturing.
Mar 2026 — Lumentum announces new US laser plant, tagged to NVIDIA-aligned optical engine demand.
Earnings-signal log
The recurring pattern: even beats get punished if guidance disappoints, because the sector carries scar tissue from JDS Uniphase (-99.4%, $50.6B loss) and Nortel (bankruptcy from a $400B peak).
- Coherent crashed ~20% after beating Q2 2025 (revenue +16.4% YoY) because Q3 guidance of $1.53B missed the Street by 0.6%. Its data-center segment growth decelerated 58% → 24% across successive quarters — read by bears as early AI "easy wins" ending.
- Coherent FY2025: record $5.81B revenue; networking $3.42B (+49% YoY); took the #1 spot for 800G module shipments in 2024; InP device output tripled YoY, expected to double again within 12 months.
- Lumentum Q1 FY2026: record $533.8M (+58% YoY); cloud/networking 88% of revenue; largest single purchase commitment in company history for ultra-high-power CPO lasers. Q2 FY2025 had flagged "yield issues related to new product ramps."
- Fabrinet FN: Q4 FY2025 revenue $910M (+20% YoY); full-year FY2025 record $3.4B (+19%); NVIDIA 28% of revenue, Cisco 18%; DCI segment $107M (+45% YoY); 800G+ products $313M (+32% sequential); 1.6T volume shipments initiated. Susquehanna: "100% Blackwell platform market share for 1.6T transceivers."
- Tower Semi TSEM: Q4 2024 revenue $387M (+10% YoY); 2024 SiPho revenue ~$105M (tripled from 2023), Q4 run-rate >$150M annualized, expected to more than double in 2025; >50% share in TIAs/drivers; serves 7 of top 11 datacom transceiver makers; launched 1.6 Tbps SiPho volume production.
- IPG Photonics: "Strong Sell" (Zacks); Q4 2024 EPS missed by 10%, revenue -21.6% YoY; a $1,000 investment over 5 years worth ~$600.
- Applied Optoelectronics: repeated misses, heavy Amazon concentration.
Forecast scoreboard (the numbers being tracked)
| Metric | Figure | Source/horizon |
|---|---|---|
| Total transceiver market | $10.9B (2023) → ~$17B (2024E) → $22-25B (2029E), 15-16% CAGR | LightCounting/Yole |
| AI backend transceivers | $22.2B by 2030, 30% CAGR; pluggable $15.3B (2025), $19.5B (2026) | Raymond James |
| CPO components | exceed $60B by 2030 (RJ); CPO market $20B by 2036 at 37% CAGR (IDTechEx) | — |
| Silicon PIC market | $95M (2023) → $863M+ (2029), 45% CAGR | Yole |
| SiPh transceiver share | ~22-24% → 44-45% by 2028 | LightCounting |
| 800GbE optics shipments | +60% in 2025 | Cignal AI |
| 800G transceiver units | 24M (2025) → 63M (2026), 2.6x | — |
| 1.6T units | 10M in 4 years (vs. a decade for 100G) | LightCounting |
| OCS market | $2.5B by 2029 | Cignal AI |
| InP substrate market | $198-210M (2025) → $385-600M (2031) | — |
| LightCounting growth | +57% (2024), +62% (2025), moderating to ~20% (2026) | LightCounting |
TSMC COUPE milestones to watch (key dependency for the whole CPO thesis)
- Gen 1 (1.6T pluggable): spec finalized Q4 2024, sampling Q4 2024, mass production target 2H 2026. Watch for slippage.
- Gen 2 (6.4T CPO on CoWoS): specs/samples early 2026, mass production late 2027-early 2028.
- Gen 3 (12.8T on-package I/O): pathfinding only, no date.
- AP7 (Chiayi): Phase 2 production starting 2026, Phase 1 mass production 2027; advanced-packaging capex projected 24% CAGR 2025-2027; SoIC capacity targeted to double.
- TSMC is 1-2 years ahead of Intel (still "R&D and demonstration stage" late 2024). TSMC filed 50 US SiPho patents in 2024 (double Intel's 26).
- Watch items per the COUPE research: TSMC SiPho revenue commentary (likely first visible in 2H26 earnings), TH6-Davisson GA timeline, Spectrum-X Photonics 2H26 production ramp, Gen 2 validation through 2027.
Source feeds for ongoing monitoring
- PhotonCap (X [@PhotonCap], paid Substack) — photonics foundry theses + OFC coverage (CPO lecture series).
- Damnang (X [@damnang2], free Substack; EE PhD) — photonics/HBM/CPO/hybrid-bonding deep dives; ran a CPO series final and OFC 2026 notes.
- SemiAnalysis, Irrational Analysis, Fabricated Knowledge, LightCounting, Yole, Cignal AI — the recurring named voices in the analyst-views note; Irrational Analysis runs explicit positions (long LITE/TSEM/FN, short COHR/MRVL) and is the signature source on the NVIDIA ring-modulator thesis.
One correction worth keeping flagged
Calient Technologies was NOT acquired by Broadcom. Calient (the S320 OCS) was bought by Suzhou Chunxing Precision Mechanical, a Chinese firm, in April 2020 — which is what creates the geopolitical concern for US hyperscalers using it. The "CA Technologies" Broadcom bought in 2018 was unrelated IT software. This conflation recurs; correct it on sight.
Sources
The optical networking and photonics coverage in this vault draws on a mix of independent semiconductor analysts (Substack and X), sell-side equity research, market-research houses, primary vendor/IR material, conference proceedings, and a set of consolidated Claude-research notes. The named authors and publications below are the ones cited or relied on across the source files; external references are the specific firms, reports, conferences, and primary documents those notes point to.
Authored analysts and publications
Where an author or publication has a page under _sources/, it is linked.
- SemiAnalysis — source-semianalysis. Dylan Patel and Daniel Nishball. Foundational "AI head-fakes" coverage of the optical transceiver market: "Nvidia's Optical Ascent: >$1B Revenue; The Missing 800G Ramp; AI Head-Fakes" (August 2023) and "Optical Boogeyman" (March 2024). Also the source's Co-Packaged Optics (CPO) book/scaling piece. Mapped Nvidia's internal optical strategy (1.6T DSP tape-out, GB200 transceiver economics).
- Irrational Analysis — no
_sources/page. Written by an anonymous semiconductor industry engineer. The deepest technical bull case in the vault: long Tower Semi (TSEM), Fabrinet (FN), Lumentum (LITE); short Coherent (COHR) and Marvell (MRVL). Originator of the Nvidia ring-modulator "half-to-one-quarter the InP content" thesis and the "VCSEL IS NOT RELIABLE AT 200G PER LANE. SHOW GR-468 DATA" position. - Fabricated Knowledge — source-doug-olaughlin (Doug O'Laughlin). Identified LRO (Linear Receive Optics) as "all the talk" in 2024 and called Broadcom's Tomahawk 5 SerDes the "best SerDes in the game today." Also the house-style model for catalog subtitles.
- Damnang — source-damnang (@damnang2, Substack, EE PhD, free tier). Technical photonics / HBM / CPO / hybrid-bonding deep dives, including a CPO series finale that connects to silicon-photonics-ai-datacenters, 5801, and TSEM, plus an OFC 2026 note.
- PhotonCap — source-photoncap (@PhotonCap, Substack, paid). Photonics-foundry theses and OFC coverage; CPO series ("Photoncap lecture 1+"). Reprinted the Chinese trade-source laser-capacity figures used in the Sumitomo captive-vs-merchant InP analysis (Mitsubishi ~40M units expanding to ~50M; Sumitomo ~80M units, EMLs 20–30%, remainder CW).
- Funda AI — source-fundaai. Funda AI analysis tooling referenced in the vault's broader research stack.
- TSPA (TSP Semiconductor) — tspasemiconductor.substack.com. Primary Substack source on TSMC's silicon photonics architecture: "TSMC's Silicon Photonics Architecture," "TSMC's Photonic Breakthrough at ECTC 2025," "OFC50 — TSMC's Vision for Silicon Photonics," and "OFC 2026 Outlook — AI Data Center Optical Interconnect Trends."
- Patrick Zhou — cited via dc-networking-deep-dive-patrick-zhou for datacenter networking architecture.
- Ray Wang (@rwang07) — X source for the TSMC COUPE production roadmap.
Other named Substack/independent sources referenced inline: iamfabian.substack.com ("Pluggables, Power, and Geopolitics: 800G and 1.6T Battle") and deepfundamental.substack.com ("Deep Dive: Optical Module Market").
Sell-side and equity research
- Raymond James — AI backend transceiver forecast ($22.2B by 2030 at 30% CAGR; pluggable $15.3B 2025, $19.5B 2026; CPO components >$60B by 2030). Calls CPO concerns "overblown." Coherent Buy PT $91–125; Lumentum Strong Buy PT $82–325; Fabrinet Overweight PT $345–550.
- Susquehanna — "100% Blackwell platform market share for 1.6T transceivers" call on Fabrinet.
- JPMorgan — silicon photonics primer sizing SiPho at an $11B market (referenced via siph-primer-jpm-semi-silicon-photonics-primer-a-11b-marke); also the Corning (GLW) fiber deep dive.
- Needham, Citi, Rosenblatt (expects Coherent to "catch up in key AI optical categories over FY26-FY27"), Nomura (China optical transceiver supply-concentration warning, via china-optical-transceivers-ai-networking-nomura-anchor-rep), Jefferies (Mellanox initiation), William Blair (Broadcom initiation), UBS (Corning initiation), Amit/ISI (AI switching primer / Arista thesis), Kerrisdale (Aixtron long thesis).
Market research and forecasting houses
- LightCounting — transceiver market forecasts (57% growth 2024, 62% 2025; SiPh transceiver share to 44% by 2028; 100G EMLs as main 2024 constraint; LPO/CPO high volumes by 2028).
- Yole Group / Yole Développement — silicon PIC market $95M (2023) to $863M+ by 2029 at 45% CAGR; 200G VCSELs not in mass production until 2026 at earliest. The paywalled Yole Photonics GaAs and InP Compound Semiconductor Market Monitor is flagged as the missing source for a defensible InP captive-vs-merchant split.
- Cignal AI — 800GbE optics shipments to grow 60% in 2025; OCS market to $2.5B by 2029; tracks the ~20-vendor OCS ecosystem.
- Dell'Oro — 800ZR/ZR+ to >1/3 of IPoDWDM revenue by 2026.
- IDTechEx — Co-Packaged Optics 2026–2036 report; CPO market at 37% CAGR to $20B by 2036.
- Mordor Intelligence — optical interconnect, tunable laser, and optical transceiver market reports.
- Fortune Business Insights — silicon photonics $2.69B (2024) to $15.83B by 2032.
- MarketsandMarkets — Trump tariffs impact on the optical transceiver market.
- SNS Insider — optical test equipment market.
- GM Insights — semiconductor metrology and inspection market.
- McKinsey — estimate of a meaningful InP-based laser supply shortfall in 2026.
Conferences, standards bodies, and industry forums
OFC (2024, 2025, 2026 — the OFC 2026 post-show release ran via Manila Times / GlobeNewsWire / IT Business Net), ECOC, OCP Summit / OCP Optical Circuit Switching Subproject, GTC 2025, ECTC 2025 (IEEE Xplore COUPE characterization paper), SEMICON Taiwan 2025, TSMC OIP 2025 / North America Technology Symposium, AIM Photonics, the OIF (Optical Internetworking Forum, 400ZR/800ZR), the LPO MSA, the O-RAN Alliance, JEDEC (Silicon Photonics Qualification Standards Task Group), and SIGCOMM / ISCA / NSDI (Google Jupiter/Apollo and Meta TopoOpt papers). Telcordia GR-468 is the reliability-qualification standard cited throughout.
Primary vendor, IR, and trade-press references
NVIDIA Newsroom and Developer Blog (Spectrum-X / Quantum-X CPO), Broadcom IR (Tomahawk 6 "Davisson" announcement), Sumitomo Electric's November 2025 "Growth Strategy for Data Center" deck, Ciena ("What is WDM?", "What is ROADM?"), Santec (OCT and laser core-technology pages, Forbes Asia 2025 Top 200), Keysight (tunable laser blog), EFFECT Photonics, Smartoptics, CableLabs, AnandTech, TweakTown, Digitimes, TrendForce, Tom's Hardware, StorageReview, Next Platform, 3D InCites, SemiWiki, Ansys, GlobeNewsWire, Semiconductor Today, Photonics.com, Nature, Science.org, and ExoSwan. AXT Inc. 10-K filings are cited as naming Sumitomo Electric as its primary InP-substrate competitor.
Consolidated source files
This sector page was built by reading and merging the following vault notes (none were moved, renamed, or deleted):
- analyst-views-optical-transceiver — sell-side and independent-analyst divergence on transceiver winners; ring modulators, 200G VCSEL debate, SiPho foundry war, LPO vs DSP, market forecasts (claude-chat, synced 2026-03-08).
- optical-components-primer — WDM/DWDM/CWDM, tunable lasers, OCT, market TAM build, key players, Santec positioning, secular drivers, barriers, risks (skill: research, 2026-03-14). Reference company Santec (6777).
- primer-networking-optics — fiber-optics supply chain by region, the Mellanox–NVIDIA story, InfiniBand vs Ethernet vs RoCE, SmartNICs/BlueField, LPO/LRO/CPO, Credo (2024-12-01).
- optical-components — the topic-hub / index page for the sector (created 2026-03-14).
- optical-networking-basics — first-principles physics of light-to-data, DFB lasers, MZMs, photodetectors, PICs, WDM, 1.6T architecture (claude-chat, 2026-03-08).
- optics-companies-challenges — ~48KB multi-part: why optics are "investment nightmares," silicon-photonics investment analysis, SiPho-disrupts-traditional-optics, and the SiTime/MEMS-vs-SiPho disambiguation (claude-chat, 2026-03-08).
- network-fundamentals — DSP-to-LPO shift, CDR circuits, silicon photonics convergence, ADN2855 burst-mode CDR, OIO vs CPO, OCP/ECOC breakthroughs (claude-chat, 2026-03-08).
- networking-notes-discord — high-speed NIC dominance, 100G→400G evolution, multi-DC/long-haul optics, pluggable vs Ciena transponder trade-offs (Discord and others, 2025-12-27).
- dc-networking-explained — backend/frontend fabrics, communications fundamentals, modulation schemes (NRZ/PAM-4/QAM), ZR and coherent optics, key vendor list (2024-07-17).
- inp-sige-photonic-materials — ~34KB: Lumentum OCS (R300/R64), then InP vs SiGe materials science, the InP substrate supply chain (AXT/Tongmei, Sumitomo, the captive-vs-merchant analysis), and the 6-inch InP transition (claude-chat, 2026-03-08).
- silicon-photonics-ai-datacenters — ~33KB: NVIDIA micro-ring modulator strategy on TSMC COUPE, ring-vs-MZI physics, EML butt-joint yield problem, InP wafer-size economics, NVIDIA 1.6T optical engine (claude-chat, 2026-03-08).
- tsmc-coupe-silicon-photonics — COUPE platform, three-generation roadmap (1.6T → 6.4T → 12.8T), performance specs, NVIDIA/Broadcom/Ayar-Alchip adoption, OFC 2026, TSMC strategic positioning, key-dates timeline, investment implications (sector-research, 2026-03-25).
- telecom-network-equip — first-principles telecom primer: optical networking (coherent, ROADMs, amplifiers, 400ZR), RAN (5G, massive MIMO, Open RAN, AI-RAN), convergence, value chain, investor metrics (skill: primer, 2026-03-17).
- source-damnang — source-profile page for Damnang.
- source-photoncap — source-profile page for PhotonCap.
All 15 listed source paths existed and were read in full.
Consolidation queue (merged 2026-05-30 — section-scoped rebuild)
Industry-wide content folded in from these source files. They stay live pending Pink's archive confirm.
- [ ]
analyst-views-optical-transceiver.md - [ ]
optical-components-primer.md - [ ]
primer-networking-optics.md - [ ]
optical-components.md - [ ]
optical-networking-basics.md - [ ]
optics-companies-challenges.md - [ ]
network-fundamentals.md - [ ]
networking-notes-discord.md - [ ]
dc-networking-explained.md - [ ]
inp-sige-photonic-materials.md - [ ]
silicon-photonics-ai-datacenters.md - [ ]
tsmc-coupe-silicon-photonics.md - [ ]
telecom-network-equip.md - [ ]
_sources/source-damnang.md - [ ]
_sources/source-photoncap.md